soc/amd/picasso/fch: replace southbridge prefix with fch

Also move the fch_* functions in the header file in the order they get
called.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I9b6c6ad744b26f8488015c38a84d7e21c7d7687a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50093
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

3 files changed, 9 insertions, 8 deletions

diff --git a/src/soc/amd/picasso/chip.c b/src/soc/amd/picasso/chip.c
index 91dd4c4956..082c328e5f 100644
--- a/src/soc/amd/picasso/chip.c
+++ b/src/soc/amd/picasso/chip.c
@@ -104,12 +104,12 @@ static void soc_init(void *chip_info)
 	fsp_silicon_init(acpi_is_wakeup_s3());
 
 	data_fabric_set_mmio_np();
-	southbridge_init(chip_info);
+	fch_init(chip_info);
 }
 
 static void soc_final(void *chip_info)
 {
-	southbridge_final(chip_info);
+	fch_final(chip_info);
 }
 
 struct chip_operations soc_amd_picasso_ops = {
diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c
index 4db7a8c615..3adcf1479c 100644
--- a/src/soc/amd/picasso/fch.c
+++ b/src/soc/amd/picasso/fch.c
@@ -219,7 +219,7 @@ static void gpp_clk_setup(void)
 	misc_write32(GPP_CLK_CNTRL, gpp_clk_ctl);
 }
 
-void southbridge_init(void *chip_info)
+void fch_init(void *chip_info)
 {
 	i2c_soc_init();
 	sb_init_acpi_ports();
@@ -238,7 +238,7 @@ void southbridge_init(void *chip_info)
 	sb_rfmux_config_override();
 }
 
-void southbridge_final(void *chip_info)
+void fch_final(void *chip_info)
 {
 	uint8_t restored_power = PM_S5_AT_POWER_RECOVERY;
 
diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h
index c7f30e24ec..f7edaad9b7 100644
--- a/src/soc/amd/picasso/include/soc/southbridge.h
+++ b/src/soc/amd/picasso/include/soc/southbridge.h
@@ -174,13 +174,14 @@ typedef struct aoac_devs {
 	unsigned int :4;
 } __packed aoac_devs_t;
 
+void fch_pre_init(void);
+void fch_early_init(void);
+void fch_init(void *chip_info);
+void fch_final(void *chip_info);
+
 void enable_aoac_devices(void);
 void wait_for_aoac_enabled(unsigned int dev);
 void sb_clk_output_48Mhz(void);
-void southbridge_final(void *chip_info);
-void southbridge_init(void *chip_info);
-void fch_pre_init(void);
-void fch_early_init(void);
 
 /* Initialize all the i2c buses that are marked with early init. */
 void i2c_soc_early_init(void);