diff options
| author | Furquan Shaikh <furquan@google.com> | 2016-07-25 16:58:15 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2016-07-28 00:38:44 +0200 |
| commit | faf07a8fabb142c8862bfe85ddd1e677e195e023 (patch) | |
| tree | 1553781ced6b365daa87ba46b366e4b61bed09f2 | |
| parent | a7f11b8ecf94d8ddb09f5dbfeff14dfee66e372d (diff) | |
| download | coreboot-faf07a8fabb142c8862bfe85ddd1e677e195e023.tar.xz | |
qualcomm/gale: Add required files to enable elog in ramstage
BUG=chrome-os-partner:55639
Change-Id: Idbad4f8763be18002907a62be755b2fdf7e479ec
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/15895
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
| -rw-r--r-- | src/mainboard/google/gale/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/qualcomm/ipq40xx/Makefile.inc | 5 |
2 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/gale/Makefile.inc b/src/mainboard/google/gale/Makefile.inc index 6c7e55f6bf..855e712914 100644 --- a/src/mainboard/google/gale/Makefile.inc +++ b/src/mainboard/google/gale/Makefile.inc @@ -39,6 +39,7 @@ ramstage-y += chromeos.c ramstage-y += mainboard.c ramstage-y += mmu.c ramstage-y += reset.c +ramstage-y += blsp.c bootblock-y += memlayout.ld romstage-y += memlayout.ld diff --git a/src/soc/qualcomm/ipq40xx/Makefile.inc b/src/soc/qualcomm/ipq40xx/Makefile.inc index 8ea28f06d7..568b0e314e 100644 --- a/src/soc/qualcomm/ipq40xx/Makefile.inc +++ b/src/soc/qualcomm/ipq40xx/Makefile.inc @@ -51,6 +51,11 @@ ramstage-y += uart.c # Want the UART always ready for the kernels' earlyprintk ramstage-y += usb.c ramstage-y += tz_wrapper.S +ramstage-y += blsp.c +ramstage-y += i2c.c +ramstage-y += qup.c +ramstage-y += spi.c + ifeq ($(CONFIG_USE_BLOBS),y) $(objcbfs)/bootblock.bin: $(call strip_quotes,$(CONFIG_SBL_ELF)) \ |