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author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2018-10-05 18:05:31 -0600 |
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committer | Martin Roth <martinroth@google.com> | 2018-10-12 15:15:31 +0000 |
commit | fdefe96503b66ef18bc81f024dda0750eefb4727 (patch) | |
tree | e5ec7b76cc82be9a3a8d1f77884f412bc930596a | |
parent | 8db8432cf5851d69550411716603dd7947a84a7c (diff) | |
download | coreboot-fdefe96503b66ef18bc81f024dda0750eefb4727.tar.xz |
amd/stoneyridge: Remove dead GPIO definitions
Delete definitions that are no longer used.
Change-Id: I94c9c33f73c1a2d9308408e3e9ca526e876d6135
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/29012
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
-rw-r--r-- | src/soc/amd/stoneyridge/include/soc/southbridge.h | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index ce3660be3c..0aeb0fc12e 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -307,12 +307,6 @@ #define WIDEIO_RANGE_ERROR -1 #define TOTAL_WIDEIO_PORTS 3 -#if ENV_BOOTBLOCK -#define GPIO_TABLE_BOOTBLOCK 1 -#else -#define GPIO_TABLE_BOOTBLOCK 0 -#endif - /* FCH AOAC Registers 0xfed81e00 */ #define FCH_AOAC_D3_CONTROL_CLK_GEN 0x40 #define FCH_AOAC_D3_CONTROL_I2C0 0x4a |