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| author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-08-12 22:50:40 +0200 |
|---|---|---|
| committer | Vladimir Serbinenko <phcoder@gmail.com> | 2014-08-13 09:35:07 +0200 |
| commit | 020dc0e13cca062b8e1983cb5e77a9482dcf6e53 (patch) | |
| tree | 03aa0fce8e1ae92015a16092619fbffe14b05e7e | |
| parent | 951fc26a084b030abb7876598831d2f6e158b5ca (diff) | |
| download | coreboot-020dc0e13cca062b8e1983cb5e77a9482dcf6e53.tar.xz | |
gm45: Allow skiping voltage config.
Change-Id: I81b9966212d09d4d2561b3adc20d6d8a8a200f4b
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6630
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
| -rw-r--r-- | src/mainboard/roda/rk9/romstage.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/gm45/gm45.h | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/gm45/pm.c | 4 |
3 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/roda/rk9/romstage.c b/src/mainboard/roda/rk9/romstage.c index d4bb56aa0d..545bd5807d 100644 --- a/src/mainboard/roda/rk9/romstage.c +++ b/src/mainboard/roda/rk9/romstage.c @@ -179,7 +179,7 @@ void main(unsigned long bist) raminit_thermal(&sysinfo); init_igd(&sysinfo, 0, 1); /* Enable IGD, disable PEG. */ - init_pm(&sysinfo); + init_pm(&sysinfo, 1); i82801ix_dmi_setup(); gm45_late_init(sysinfo.stepping); diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h index edcb56b12b..db64d867f2 100644 --- a/src/northbridge/intel/gm45/gm45.h +++ b/src/northbridge/intel/gm45/gm45.h @@ -408,7 +408,7 @@ void get_gmch_info(sysinfo_t *); void raminit(sysinfo_t *, int s3resume); void raminit_thermal(const sysinfo_t *); void init_igd(const sysinfo_t *, int no_igd, int no_peg); -void init_pm(const sysinfo_t *); +void init_pm(const sysinfo_t *, int do_freq_scaling_cfg); int raminit_read_vco_index(void); u32 raminit_get_rank_addr(unsigned int channel, unsigned int rank); diff --git a/src/northbridge/intel/gm45/pm.c b/src/northbridge/intel/gm45/pm.c index b9ac7f05f1..64bb37f2b2 100644 --- a/src/northbridge/intel/gm45/pm.c +++ b/src/northbridge/intel/gm45/pm.c @@ -144,7 +144,7 @@ static void init_freq_scaling(const gmch_gfx_t sku, const int low_power_mode) MCHBAR16(0x11b8 + 2) = 0x4000; } -void init_pm(const sysinfo_t *const sysinfo) +void init_pm(const sysinfo_t *const sysinfo, int do_freq_scaling_cfg) { const stepping_t stepping = sysinfo->stepping; const fsb_clock_t fsb = sysinfo->selected_timings.fsb_clock; @@ -283,7 +283,7 @@ void init_pm(const sysinfo_t *const sysinfo) MCHBAR32(0x44) &= ~(1 << 31); /* Was set above. */ } - if ((sysinfo->gfx_type != GMCH_PM45) && + if ((sysinfo->gfx_type != GMCH_PM45) && do_freq_scaling_cfg && (sysinfo->gfx_type != GMCH_UNKNOWN)) init_freq_scaling(sysinfo->gfx_type, sysinfo->gs45_low_power_mode); |