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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-07-03 06:50:19 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-07-04 04:14:22 +0000
commit04d025cf5015b06f9e4dafc7092cfbd5d24b241e (patch)
tree05c5b7a4b4931faed61dfb84b86a759810f99be2
parent8560db611608cbe0e344c1a301cf23e4c1fb36c8 (diff)
downloadcoreboot-04d025cf5015b06f9e4dafc7092cfbd5d24b241e.tar.xz
amdfam10: Declare get_sysinfo()
It's forbidden to use dereference CAR_GLOBAL variables directly. The notation fails after CAR teardown for romstage. Change-Id: I6e6285ca0f520608c2a344517fbac943aeb36d87 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33995 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/advansus/a785e-i/romstage.c3
-rw-r--r--src/mainboard/amd/bimini_fam10/romstage.c3
-rw-r--r--src/mainboard/amd/mahogany_fam10/romstage.c3
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/romstage.c3
-rw-r--r--src/mainboard/amd/tilapia_fam10/romstage.c3
-rw-r--r--src/mainboard/asus/kcma-d8/romstage.c3
-rw-r--r--src/mainboard/asus/kfsn4-dre/romstage.c3
-rw-r--r--src/mainboard/asus/kgpe-d16/romstage.c5
-rw-r--r--src/mainboard/asus/m4a78-em/romstage.c3
-rw-r--r--src/mainboard/asus/m4a785-m/romstage.c3
-rw-r--r--src/mainboard/asus/m5a88-v/romstage.c3
-rw-r--r--src/mainboard/avalue/eax-785e/romstage.c3
-rw-r--r--src/mainboard/gigabyte/ma785gm/romstage.c3
-rw-r--r--src/mainboard/gigabyte/ma785gmt/romstage.c3
-rw-r--r--src/mainboard/gigabyte/ma78gm/romstage.c3
-rw-r--r--src/mainboard/hp/dl165_g6_fam10/romstage.c3
-rw-r--r--src/mainboard/iei/kino-780am2-fam10/romstage.c3
-rw-r--r--src/mainboard/jetway/pa78vm5/romstage.c3
-rw-r--r--src/mainboard/msi/ms9652_fam10/romstage.c3
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/romstage.c3
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/romstage.c3
-rw-r--r--src/mainboard/supermicro/h8scm_fam10/romstage.c3
-rw-r--r--src/mainboard/tyan/s2912_fam10/romstage.c3
-rw-r--r--src/northbridge/amd/amdfam10/amdfam10.h6
-rw-r--r--src/northbridge/amd/amdfam10/raminit.h1
-rw-r--r--src/northbridge/amd/amdfam10/raminit_amdmct.c7
26 files changed, 31 insertions, 54 deletions
diff --git a/src/mainboard/advansus/a785e-i/romstage.c b/src/mainboard/advansus/a785e-i/romstage.c
index d8e618570f..ca32977e10 100644
--- a/src/mainboard/advansus/a785e-i/romstage.c
+++ b/src/mainboard/advansus/a785e-i/romstage.c
@@ -46,7 +46,6 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
int spd_read_byte(u32 device, u32 address)
@@ -56,7 +55,7 @@ int spd_read_byte(u32 device, u32 address)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
u32 bsp_apicid = 0, val;
msr_t msr;
diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c
index e9d391cb0a..e2142f2791 100644
--- a/src/mainboard/amd/bimini_fam10/romstage.c
+++ b/src/mainboard/amd/bimini_fam10/romstage.c
@@ -42,7 +42,6 @@
#include "cpu/amd/quadcore/quadcore.c"
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
int spd_read_byte(u32 device, u32 address)
@@ -52,7 +51,7 @@ int spd_read_byte(u32 device, u32 address)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
u32 bsp_apicid = 0, val;
msr_t msr;
diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c
index 2376414206..3397d26d96 100644
--- a/src/mainboard/amd/mahogany_fam10/romstage.c
+++ b/src/mainboard/amd/mahogany_fam10/romstage.c
@@ -46,7 +46,6 @@
#include "cpu/amd/quadcore/quadcore.c"
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
int spd_read_byte(u32 device, u32 address)
@@ -57,7 +56,7 @@ int spd_read_byte(u32 device, u32 address)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
u32 bsp_apicid = 0, val;
msr_t msr;
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
index 1ba65427c2..3871c592d5 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
@@ -42,7 +42,6 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
static void memreset_setup(void)
{
@@ -167,7 +166,7 @@ static const u8 spd_addr[] = {
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
u32 bsp_apicid = 0, val;
msr_t msr;
diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c
index 9aa59b285a..702e9db9df 100644
--- a/src/mainboard/amd/tilapia_fam10/romstage.c
+++ b/src/mainboard/amd/tilapia_fam10/romstage.c
@@ -44,7 +44,6 @@
#define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1)
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
int spd_read_byte(u32 device, u32 address)
@@ -55,7 +54,7 @@ int spd_read_byte(u32 device, u32 address)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
u32 bsp_apicid = 0, val;
msr_t msr;
diff --git a/src/mainboard/asus/kcma-d8/romstage.c b/src/mainboard/asus/kcma-d8/romstage.c
index 4bcfeddf53..51d178fe88 100644
--- a/src/mainboard/asus/kcma-d8/romstage.c
+++ b/src/mainboard/asus/kcma-d8/romstage.c
@@ -51,7 +51,6 @@
#define SERIAL_1_DEV PNP_DEV(0x2e, W83667HG_A_SP2)
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
inline int spd_read_byte(unsigned int device, unsigned int address)
{
@@ -355,7 +354,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
: "=r" (esp)
);
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
/* Limit the maximum HT speed to 2.6GHz to prevent lockups
* due to HT CPU <--> CPU wiring not being validated to 3.2GHz
diff --git a/src/mainboard/asus/kfsn4-dre/romstage.c b/src/mainboard/asus/kfsn4-dre/romstage.c
index 817e6db22a..7b20243863 100644
--- a/src/mainboard/asus/kfsn4-dre/romstage.c
+++ b/src/mainboard/asus/kfsn4-dre/romstage.c
@@ -54,7 +54,6 @@
#define GPIO3_DEV PNP_DEV(0x2e, W83627THG_GPIO3)
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
int spd_read_byte(unsigned int device, unsigned int address)
{
@@ -184,7 +183,7 @@ void activate_spd_rom(const struct mem_controller *ctrl)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
u32 bsp_apicid = 0, val, wants_reset;
msr_t msr;
diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c
index 85ad0b6f64..637ec42109 100644
--- a/src/mainboard/asus/kgpe-d16/romstage.c
+++ b/src/mainboard/asus/kgpe-d16/romstage.c
@@ -52,7 +52,6 @@
#define SERIAL_1_DEV PNP_DEV(0x2e, W83667HG_A_SP2)
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
int spd_read_byte(unsigned int device, unsigned int address)
{
@@ -180,7 +179,7 @@ static const uint8_t spd_addr_fam10[] = {
void activate_spd_rom(const struct mem_controller *ctrl)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
printk(BIOS_DEBUG, "activate_spd_rom() for node %02x\n", ctrl->node_id);
if (ctrl->node_id == 0) {
printk(BIOS_DEBUG, "enable_spd_node0()\n");
@@ -467,7 +466,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
: "=r" (esp)
);
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
/* Limit the maximum HT speed to 2.6GHz to prevent lockups
* due to HT CPU <--> CPU wiring not being validated to 3.2GHz
diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c
index 072b758bef..c52b35b22f 100644
--- a/src/mainboard/asus/m4a78-em/romstage.c
+++ b/src/mainboard/asus/m4a78-em/romstage.c
@@ -47,7 +47,6 @@
#define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
int spd_read_byte(u32 device, u32 address)
@@ -57,7 +56,7 @@ int spd_read_byte(u32 device, u32 address)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
u32 bsp_apicid = 0, val;
msr_t msr;
diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c
index c03115dc0b..b7af9e2cf5 100644
--- a/src/mainboard/asus/m4a785-m/romstage.c
+++ b/src/mainboard/asus/m4a785-m/romstage.c
@@ -47,7 +47,6 @@
#define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
int spd_read_byte(u32 device, u32 address)
@@ -57,7 +56,7 @@ int spd_read_byte(u32 device, u32 address)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
u32 bsp_apicid = 0, val;
msr_t msr;
diff --git a/src/mainboard/asus/m5a88-v/romstage.c b/src/mainboard/asus/m5a88-v/romstage.c
index ad05371367..1309d67d88 100644
--- a/src/mainboard/asus/m5a88-v/romstage.c
+++ b/src/mainboard/asus/m5a88-v/romstage.c
@@ -47,7 +47,6 @@
#define SERIAL_DEV PNP_DEV(0x4e, IT8721F_SP1)
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
int spd_read_byte(u32 device, u32 address)
@@ -58,7 +57,7 @@ int spd_read_byte(u32 device, u32 address)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
u32 bsp_apicid = 0, val;
msr_t msr;
diff --git a/src/mainboard/avalue/eax-785e/romstage.c b/src/mainboard/avalue/eax-785e/romstage.c
index 2d3c762c1a..b4b536e1e4 100644
--- a/src/mainboard/avalue/eax-785e/romstage.c
+++ b/src/mainboard/avalue/eax-785e/romstage.c
@@ -46,7 +46,6 @@
#define CLK_DEV PNP_DEV(0x2e, W83627HF_SP1)
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
int spd_read_byte(u32 device, u32 address)
@@ -56,7 +55,7 @@ int spd_read_byte(u32 device, u32 address)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
u32 bsp_apicid = 0, val;
msr_t msr;
diff --git a/src/mainboard/gigabyte/ma785gm/romstage.c b/src/mainboard/gigabyte/ma785gm/romstage.c
index cbcb54d709..0d1f45d7af 100644
--- a/src/mainboard/gigabyte/ma785gm/romstage.c
+++ b/src/mainboard/gigabyte/ma785gm/romstage.c
@@ -47,7 +47,6 @@
#define GPIO_DEV PNP_DEV(0x2e, IT8718F_GPIO)
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
int spd_read_byte(u32 device, u32 address)
@@ -57,7 +56,7 @@ int spd_read_byte(u32 device, u32 address)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
u32 bsp_apicid = 0, val;
msr_t msr;
diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c
index 2af958b335..384eccdb11 100644
--- a/src/mainboard/gigabyte/ma785gmt/romstage.c
+++ b/src/mainboard/gigabyte/ma785gmt/romstage.c
@@ -47,7 +47,6 @@
#define GPIO_DEV PNP_DEV(0x2e, IT8718F_GPIO)
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
int spd_read_byte(u32 device, u32 address)
@@ -57,7 +56,7 @@ int spd_read_byte(u32 device, u32 address)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
u32 bsp_apicid = 0, val;
msr_t msr;
diff --git a/src/mainboard/gigabyte/ma78gm/romstage.c b/src/mainboard/gigabyte/ma78gm/romstage.c
index 4a28a2edbb..48af367817 100644
--- a/src/mainboard/gigabyte/ma78gm/romstage.c
+++ b/src/mainboard/gigabyte/ma78gm/romstage.c
@@ -47,7 +47,6 @@
#define GPIO_DEV PNP_DEV(0x2e, IT8718F_GPIO)
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
int spd_read_byte(u32 device, u32 address)
@@ -57,7 +56,7 @@ int spd_read_byte(u32 device, u32 address)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
u32 bsp_apicid = 0, val;
msr_t msr;
diff --git a/src/mainboard/hp/dl165_g6_fam10/romstage.c b/src/mainboard/hp/dl165_g6_fam10/romstage.c
index 94489c4ca3..354bf125be 100644
--- a/src/mainboard/hp/dl165_g6_fam10/romstage.c
+++ b/src/mainboard/hp/dl165_g6_fam10/romstage.c
@@ -53,7 +53,6 @@
#define RTC_DEV PNP_DEV(0x4e, PC87417_RTC)
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
void activate_spd_rom(const struct mem_controller *ctrl)
{
@@ -83,7 +82,7 @@ static const u8 spd_addr[] = {
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
u32 bsp_apicid = 0, val;
msr_t msr;
diff --git a/src/mainboard/iei/kino-780am2-fam10/romstage.c b/src/mainboard/iei/kino-780am2-fam10/romstage.c
index fa578942ad..d8afd67e94 100644
--- a/src/mainboard/iei/kino-780am2-fam10/romstage.c
+++ b/src/mainboard/iei/kino-780am2-fam10/romstage.c
@@ -46,7 +46,6 @@
#define SERIAL_DEV PNP_DEV(0x2e, F71859_SP1)
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
int spd_read_byte(u32 device, u32 address)
@@ -56,7 +55,7 @@ int spd_read_byte(u32 device, u32 address)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
u32 bsp_apicid = 0, val;
msr_t msr;
diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c
index 8296b4c1c5..33d40b8876 100644
--- a/src/mainboard/jetway/pa78vm5/romstage.c
+++ b/src/mainboard/jetway/pa78vm5/romstage.c
@@ -51,7 +51,6 @@
#endif
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
int spd_read_byte(u32 device, u32 address)
@@ -61,7 +60,7 @@ int spd_read_byte(u32 device, u32 address)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
u32 bsp_apicid = 0, val;
msr_t msr;
diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index ecb3ab9a0f..2fc6fb42f0 100644
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -45,7 +45,6 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
inline int spd_read_byte(unsigned int device, unsigned int address)
@@ -100,7 +99,7 @@ static const u8 spd_addr[] = {
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
u32 bsp_apicid = 0, val, wants_reset;
u8 reg;
msr_t msr;
diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index c6f5d63b9f..2750129859 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@ -48,7 +48,6 @@
#define SUPERIO_DEV PNP_DEV(0x2e, 0)
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
inline int spd_read_byte(unsigned int device, unsigned int address)
@@ -101,7 +100,7 @@ static const u8 spd_addr[] = {
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
u32 bsp_apicid = 0, val, wants_reset;
msr_t msr;
diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index 87957e9443..56d9f35ef2 100644
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -51,7 +51,6 @@
#define SMBUS_SWITCH2 0x72
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
void activate_spd_rom(const struct mem_controller *ctrl)
{
@@ -154,7 +153,7 @@ static void write_GPIO(void)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
u32 bsp_apicid = 0, val, wants_reset;
msr_t msr;
diff --git a/src/mainboard/supermicro/h8scm_fam10/romstage.c b/src/mainboard/supermicro/h8scm_fam10/romstage.c
index 93dca0293c..302e86f4e8 100644
--- a/src/mainboard/supermicro/h8scm_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8scm_fam10/romstage.c
@@ -43,7 +43,6 @@
#include "cpu/amd/quadcore/quadcore.c"
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
int spd_read_byte(u32 device, u32 address)
@@ -53,7 +52,7 @@ int spd_read_byte(u32 device, u32 address)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
static const u8 spd_addr[] = {
RC00, 0x52, 0x53, 0, 0, 0x50, 0x51, 0, 0,
//RC00, DIMM2, DIMM3, 0, 0, DIMM0, DIMM1, 0, 0,
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index 85824aa494..f44346bbb6 100644
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -44,7 +44,6 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
inline int spd_read_byte(unsigned int device, unsigned int address)
@@ -104,7 +103,7 @@ static const u8 spd_addr[] = {
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
u32 bsp_apicid = 0, val, wants_reset;
msr_t msr;
diff --git a/src/northbridge/amd/amdfam10/amdfam10.h b/src/northbridge/amd/amdfam10/amdfam10.h
index d2a05287df..0fbcea687c 100644
--- a/src/northbridge/amd/amdfam10/amdfam10.h
+++ b/src/northbridge/amd/amdfam10/amdfam10.h
@@ -989,12 +989,6 @@ struct sys_info {
struct DCTStatStruc DCTstatA[NODE_NUMS];
} __packed;
-
-/*
-#ifdef __PRE_RAM__
-extern struct sys_info sysinfo_car;
-#endif
-*/
#ifndef __PRE_RAM__
struct device *get_node_pci(u32 nodeid, u32 fn);
#endif
diff --git a/src/northbridge/amd/amdfam10/raminit.h b/src/northbridge/amd/amdfam10/raminit.h
index 9d1d91d536..c9c57ff2c2 100644
--- a/src/northbridge/amd/amdfam10/raminit.h
+++ b/src/northbridge/amd/amdfam10/raminit.h
@@ -30,6 +30,7 @@ int mctRead_SPD(u32 smaddr, u32 reg);
void mctSMBhub_Init(u32 node);
void mctGet_DIMMAddr(struct DCTStatStruc *pDCTstat, u32 node);
void set_sysinfo_in_ram(u32 val);
+struct sys_info *get_sysinfo(void);
void raminit_amdmct(struct sys_info *sysinfo);
void amdmct_cbmem_store_info(struct sys_info *sysinfo);
void fill_mem_ctrl(u32 controllers, struct mem_controller *ctrl_a, const u8 *spd_addr);
diff --git a/src/northbridge/amd/amdfam10/raminit_amdmct.c b/src/northbridge/amd/amdfam10/raminit_amdmct.c
index 1f2b51d8bf..440a02635b 100644
--- a/src/northbridge/amd/amdfam10/raminit_amdmct.c
+++ b/src/northbridge/amd/amdfam10/raminit_amdmct.c
@@ -29,7 +29,12 @@
/* Global allocation of sysinfo_car */
#include <arch/early_variables.h>
-struct sys_info sysinfo_car CAR_GLOBAL;
+static struct sys_info sysinfo_car CAR_GLOBAL;
+
+struct sys_info *get_sysinfo(void)
+{
+ return car_get_var_ptr(&sysinfo_car);
+}
struct mem_controller;
extern int spd_read_byte(unsigned int device, unsigned int address);