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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-09-29 20:52:26 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-10-01 08:34:28 +0200 |
| commit | 075ff736f69d8adb5d44a419b09aa7aad4594371 (patch) | |
| tree | 4d9899a80275993961cab64a8e716347e1363ec4 | |
| parent | dae8fe747cb32d048147ed84ff0fbab450e85aa8 (diff) | |
| download | coreboot-075ff736f69d8adb5d44a419b09aa7aad4594371.tar.xz | |
mainboard/digitallogic/msm800sev: Use tabs for indents
Change-Id: I39ad6606869f059b2ef0c45d6741b844b3791655
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16821
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
| -rw-r--r-- | src/mainboard/digitallogic/msm800sev/devicetree.cb | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/digitallogic/msm800sev/devicetree.cb b/src/mainboard/digitallogic/msm800sev/devicetree.cb index db511e50ab..b03d4c532c 100644 --- a/src/mainboard/digitallogic/msm800sev/devicetree.cb +++ b/src/mainboard/digitallogic/msm800sev/devicetree.cb @@ -1,8 +1,8 @@ chip northbridge/amd/lx - device domain 0 on - device pci 1.0 on end + device domain 0 on + device pci 1.0 on end device pci 1.1 on end - chip southbridge/amd/cs5536 + chip southbridge/amd/cs5536 # IRQ 12 and 1 unmasked, Keyboard and Mouse IRQs. OK # SIRQ Mode = Active(Quiet) mode. Save power.... # Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK @@ -25,7 +25,7 @@ chip northbridge/amd/lx register "com2_address" = "0x2F8" register "com2_irq" = "3" register "unwanted_vpci[0]" = "0" # End of list has a zero - device pci f.0 on # ISA Bridge + device pci f.0 on # ISA Bridge chip superio/winbond/w83627hf device pnp 2e.0 off # Floppy io 0x60 = 0x3f0 @@ -69,10 +69,10 @@ chip northbridge/amd/lx end device pci f.1 on end # Flash controller device pci f.2 on end # IDE controller - device pci f.3 on end # Audio - device pci f.4 on end # OHCI + device pci f.3 on end # Audio + device pci f.4 on end # OHCI device pci f.5 on end # EHCI - end + end end # APIC cluster is late CPU init. |