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authorDuncan Laurie <dlaurie@chromium.org>2012-07-16 12:11:53 -0700
committerRonald G. Minnich <rminnich@gmail.com>2012-07-26 20:31:52 +0200
commit0eefa005030a70f5c691155b931bb778ad1fb2ae (patch)
treea35355b720a90d13223939b3abc5f6a7658075f0
parent10d31aba76a0a0fd3fd79d32698c2634a4293add (diff)
downloadcoreboot-0eefa005030a70f5c691155b931bb778ad1fb2ae.tar.xz
ACPI: Add function to write _PPC using NVS
The existing NVS variable for PPCM will be used to select a dynamic max P-state. By itself this does not change existing behavior because the NVS PPCM variable is initialized to zero. PPCM can be tested by building and booting a modified BIOS that sets gnvs->ppcm to a value greater than 1 and checking from the OS that the P-state is limited to that value. Change-Id: Ia7b3bbc6b84c1aa42349bb236abee5cc92486561 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/1341 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
-rw-r--r--src/arch/x86/boot/acpigen.c26
-rw-r--r--src/arch/x86/include/arch/acpigen.h1
-rw-r--r--src/cpu/intel/model_206ax/acpi.c2
3 files changed, 28 insertions, 1 deletions
diff --git a/src/arch/x86/boot/acpigen.c b/src/arch/x86/boot/acpigen.c
index 71aa10cd17..47845a01a6 100644
--- a/src/arch/x86/boot/acpigen.c
+++ b/src/arch/x86/boot/acpigen.c
@@ -396,6 +396,32 @@ int acpigen_write_PPC(u8 nr)
return len;
}
+/* generates a func with max supported P states */
+int acpigen_write_PPC_NVS(void)
+{
+/*
+ Method (_PPC, 0, NotSerialized)
+ {
+ Return (PPCM)
+ }
+*/
+ int len;
+ /* method op */
+ acpigen_emit_byte(0x14);
+ len = acpigen_write_len_f();
+ len += acpigen_emit_namestring("_PPC");
+ /* no fnarg */
+ acpigen_emit_byte(0x00);
+ /* return */
+ acpigen_emit_byte(0xa4);
+ /* arg */
+ len += acpigen_emit_namestring("PPCM");
+ /* add all single bytes */
+ len += 3;
+ acpigen_patch_len(len - 1);
+ return len;
+}
+
int acpigen_write_TPC(const char *gnvs_tpc_limit)
{
/*
diff --git a/src/arch/x86/include/arch/acpigen.h b/src/arch/x86/include/arch/acpigen.h
index aebf508b5e..5297aff013 100644
--- a/src/arch/x86/include/arch/acpigen.h
+++ b/src/arch/x86/include/arch/acpigen.h
@@ -42,6 +42,7 @@ int acpigen_write_name_qword(const char *name, uint64_t val);
int acpigen_write_name_byte(const char *name, uint8_t val);
int acpigen_write_scope(const char *name);
int acpigen_write_PPC(u8 nr);
+int acpigen_write_PPC_NVS(void);
int acpigen_write_empty_PCT(void);
int acpigen_write_empty_PTC(void);
int acpigen_write_TPC(const char *gnvs_tpc_limit);
diff --git a/src/cpu/intel/model_206ax/acpi.c b/src/cpu/intel/model_206ax/acpi.c
index 9784c4771f..f66df51a2a 100644
--- a/src/cpu/intel/model_206ax/acpi.c
+++ b/src/cpu/intel/model_206ax/acpi.c
@@ -251,7 +251,7 @@ static int generate_P_state_entries(int core, int cores_per_package)
len = acpigen_write_empty_PCT();
/* Write _PPC with no limit on supported P-state */
- len += acpigen_write_PPC(0);
+ len += acpigen_write_PPC_NVS();
/* Write PSD indicating configured coordination type */
len += acpigen_write_PSD_package(core, cores_per_package, coord_type);