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authorAndrey Petrov <andrey.petrov@intel.com>2016-03-08 16:12:06 -0800
committerAaron Durbin <adurbin@chromium.org>2016-03-10 23:02:57 +0100
commit1e70cda320df24e477d8ee80a88e9add2eb535c9 (patch)
tree14e9a54252333004155c5d3128fe4c9c8a211e06
parente953dce7c463824a607cca6d845615e87d0dda6e (diff)
downloadcoreboot-1e70cda320df24e477d8ee80a88e9add2eb535c9.tar.xz
soc/intel/apollolake: Avoid UART BAR relocation at ramstage
UART bar gets overwritten during resource allocation stage. As result the serial driver ends up using stale BAR so serial output does not work. This driver simply tells resource allocator not to change BAR of UART device. Change-Id: I81f4f04089106c80bea97f0bbaba890df00c8ac5 Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/13997 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
-rw-r--r--src/soc/intel/apollolake/Makefile.inc1
-rw-r--r--src/soc/intel/apollolake/uart.c56
2 files changed, 57 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc
index 1b2efdf362..8581607934 100644
--- a/src/soc/intel/apollolake/Makefile.inc
+++ b/src/soc/intel/apollolake/Makefile.inc
@@ -32,6 +32,7 @@ ramstage-y += gpio.c
ramstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
ramstage-y += memmap.c
ramstage-y += mmap_boot.c
+ramstage-y += uart.c
CPPFLAGS_common += -I$(src)/soc/intel/apollolake/include
diff --git a/src/soc/intel/apollolake/uart.c b/src/soc/intel/apollolake/uart.c
new file mode 100644
index 0000000000..2a32842cb3
--- /dev/null
+++ b/src/soc/intel/apollolake/uart.c
@@ -0,0 +1,56 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/*
+ * The sole purpose of this driver is to avoid BAR to be changed during
+ * resource allocation. Since configuration space is just 32 bytes it
+ * shouldn't cause any fragmentation.
+ */
+
+#include <console/uart.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <soc/pci_ids.h>
+#include <soc/pci_devs.h>
+
+static void aplk_uart_read_resources(struct device *dev)
+{
+ pci_dev_read_resources(dev);
+
+ if ((IS_ENABLED(CONFIG_SOC_UART_DEBUG) &&
+ dev->path.pci.devfn == _LPSS_PCI_DEVFN(UART,
+ CONFIG_UART_FOR_CONSOLE))) {
+ /* will override existing resource. */
+ fixed_mem_resource(dev, PCI_BASE_ADDRESS_0,
+ CONFIG_CONSOLE_UART_BASE_ADDRESS >> 10, 4, 0);
+ }
+}
+
+static struct device_operations uart_ops = {
+ .read_resources = aplk_uart_read_resources,
+ .set_resources = DEVICE_NOOP,
+ .enable_resources = DEVICE_NOOP,
+ .init = pci_dev_init,
+ .enable = DEVICE_NOOP
+};
+
+static const unsigned short uart_ids[] = {
+ PCI_DEVICE_ID_APOLLOLAKE_UART0, PCI_DEVICE_ID_APOLLOLAKE_UART1,
+ PCI_DEVICE_ID_APOLLOLAKE_UART2, PCI_DEVICE_ID_APOLLOLAKE_UART3,
+ 0
+};
+
+static const struct pci_driver uart_driver __pci_driver = {
+ .ops = &uart_ops,
+ .vendor = PCI_VENDOR_ID_INTEL,
+ .devices = uart_ids
+};