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authorPatrick Georgi <pgeorgi@chromium.org>2015-07-01 20:29:42 +0200
committerPatrick Georgi <pgeorgi@google.com>2015-07-01 21:43:39 +0200
commit20864c1d6dc6102168743fe283fae7d16bf2cef2 (patch)
treea92ec28901ff33badae48166be092924119faf36
parent088c1894f825a14e769c7b3d36333f5e4b6d0685 (diff)
downloadcoreboot-20864c1d6dc6102168743fe283fae7d16bf2cef2.tar.xz
rockchip/rk3288: Initialize CPU in bootblock
Some basic MMU setup is required to allow unaligned memory accesses that happen across our entire codebase. Change-Id: If5a84e19a7a3e47d6009fd073b1323dfb25e6a06 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/10753 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner <jwerner@chromium.org>
-rw-r--r--src/soc/rockchip/rk3288/Makefile.inc2
-rw-r--r--src/soc/rockchip/rk3288/bootblock.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/rockchip/rk3288/Makefile.inc b/src/soc/rockchip/rk3288/Makefile.inc
index 0ec127b23a..cd523b0d56 100644
--- a/src/soc/rockchip/rk3288/Makefile.inc
+++ b/src/soc/rockchip/rk3288/Makefile.inc
@@ -21,7 +21,7 @@ ifeq ($(CONFIG_SOC_ROCKCHIP_RK3288),y)
IDBTOOL = util/rockchip/make_idb.py
-#bootblock-y += bootblock.c
+bootblock-y += bootblock.c
bootblock-y += cbmem.c
ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
bootblock-$(CONFIG_DRIVERS_UART) += uart.c
diff --git a/src/soc/rockchip/rk3288/bootblock.c b/src/soc/rockchip/rk3288/bootblock.c
index ce0ab33a68..d60c860054 100644
--- a/src/soc/rockchip/rk3288/bootblock.c
+++ b/src/soc/rockchip/rk3288/bootblock.c
@@ -27,7 +27,7 @@
#include <soc/timer.h>
#include <symbols.h>
-static void bootblock_soc_init(void)
+void bootblock_soc_init(void)
{
rkclk_init();