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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-02-15 10:19:23 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-03-04 15:28:41 +0100
commit2b95da01e6bbdd8b001fa1ff2830dbaa70f14c3e (patch)
treed4dabf55577b4f01c133a94f506360e79286a777
parent4770749edca1e54c9a04b48ca6909d786139fa1b (diff)
downloadcoreboot-2b95da01e6bbdd8b001fa1ff2830dbaa70f14c3e.tar.xz
uart8250mem: Unify calls with generic UART
NOTE: UART base for SMM continues to be broken, as it does not use the address resource allocator has assigned. Change-Id: I79f2ca8427a33a3c719adfe277c24dab79a33ef3 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5235 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
-rw-r--r--src/arch/x86/lib/romstage_console.c11
-rw-r--r--src/console/console.c6
-rw-r--r--src/console/uart8250mem_console.c29
-rw-r--r--src/cpu/x86/smm/smiutil.c10
-rw-r--r--src/drivers/oxford/oxpcie/Makefile.inc5
-rw-r--r--src/drivers/oxford/oxpcie/oxpcie.c7
-rw-r--r--src/drivers/oxford/oxpcie/oxpcie_early.c50
-rw-r--r--src/include/console/uart.h2
-rw-r--r--src/include/uart8250.h17
-rw-r--r--src/lib/uart8250mem.c89
10 files changed, 102 insertions, 124 deletions
diff --git a/src/arch/x86/lib/romstage_console.c b/src/arch/x86/lib/romstage_console.c
index 89d7f820a6..6566b2fe87 100644
--- a/src/arch/x86/lib/romstage_console.c
+++ b/src/arch/x86/lib/romstage_console.c
@@ -26,20 +26,13 @@
#include <console/spkmodem.h>
#include <console/vtxprintf.h>
-#if CONFIG_CONSOLE_SERIAL8250MEM
-#include <uart8250.h>
-#endif
-
void console_tx_byte(unsigned char byte)
{
if (byte == '\n')
console_tx_byte('\r');
#if CONFIG_CONSOLE_SERIAL8250MEM
- if (oxford_oxpcie_present) {
- uart8250_mem_tx_byte(
- CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000, byte);
- }
+ uart_tx_byte(byte);
#endif
#if CONFIG_CONSOLE_SERIAL8250
uart_tx_byte(byte);
@@ -61,7 +54,7 @@ void console_tx_byte(unsigned char byte)
void console_tx_flush(void)
{
#if CONFIG_CONSOLE_SERIAL8250MEM
- uart8250_mem_tx_flush(CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000);
+ uart_tx_flush();
#endif
#if CONFIG_CONSOLE_SERIAL8250
uart_tx_flush();
diff --git a/src/console/console.c b/src/console/console.c
index 334e14012a..e09625f251 100644
--- a/src/console/console.c
+++ b/src/console/console.c
@@ -101,12 +101,12 @@ void console_init(void)
#if defined(__BOOT_BLOCK__) && CONFIG_BOOTBLOCK_CONSOLE || \
!defined(__BOOT_BLOCK__) && CONFIG_EARLY_CONSOLE
+#if CONFIG_DRIVERS_OXFORD_OXPCIE
+ oxford_init();
+#endif
#if CONFIG_CONSOLE_SERIAL
uart_init();
#endif
-#if CONFIG_DRIVERS_OXFORD_OXPCIE && CONFIG_CONSOLE_SERIAL8250MEM
- oxford_init();
-#endif
#if CONFIG_CONSOLE_NE2K
ne2k_init(CONFIG_CONSOLE_NE2K_IO_PORT);
#endif
diff --git a/src/console/uart8250mem_console.c b/src/console/uart8250mem_console.c
index eb4e0e0b7e..7e52aed273 100644
--- a/src/console/uart8250mem_console.c
+++ b/src/console/uart8250mem_console.c
@@ -19,47 +19,30 @@
#include <console/console.h>
#include <console/uart.h>
-#include <uart8250.h>
-static u32 uart_bar = 0;
-
-void uartmem_init(void)
-{
- uart_bar = uart_mem_init();
-}
-
-u32 uartmem_getbaseaddr(void)
+static void uartmem_init(void)
{
- return uart_bar;
+ uart_init();
}
static void uartmem_tx_byte(unsigned char data)
{
- if (!uart_bar)
- return;
-
- uart8250_mem_tx_byte(uart_bar, data);
+ uart_tx_byte(data);
}
static void uartmem_tx_flush(void)
{
- uart8250_mem_tx_flush(uart_bar);
+ uart_tx_flush();
}
static unsigned char uartmem_rx_byte(void)
{
- if (!uart_bar)
- return 0;
-
- return uart8250_mem_rx_byte(uart_bar);
+ return uart_rx_byte();
}
static int uartmem_tst_byte(void)
{
- if (!uart_bar)
- return 0;
-
- return uart8250_mem_can_rx_byte(uart_bar);
+ return uart_can_rx_byte();
}
static const struct console_driver uart8250mem_console __console = {
diff --git a/src/cpu/x86/smm/smiutil.c b/src/cpu/x86/smm/smiutil.c
index 3702e5c179..43731bc3c8 100644
--- a/src/cpu/x86/smm/smiutil.c
+++ b/src/cpu/x86/smm/smiutil.c
@@ -24,13 +24,8 @@
#include <cpu/x86/smm.h>
#include <console/console.h>
#include <console/uart.h>
-#include <uart8250.h>
#include <console/vtxprintf.h>
-#if CONFIG_CONSOLE_SERIAL8250MEM
-static u32 serial8250mem_base_address = 0;
-#endif
-
void console_tx_flush(void)
{
}
@@ -41,8 +36,7 @@ void console_tx_byte(unsigned char byte)
console_tx_byte('\r');
#if CONFIG_CONSOLE_SERIAL8250MEM
- if (serial8250mem_base_address)
- uart8250_mem_tx_byte(serial8250mem_base_address, byte);
+ uart_tx_byte(byte);
#endif
#if CONFIG_CONSOLE_SERIAL8250
uart_tx_byte(byte);
@@ -57,7 +51,7 @@ void console_init(void)
uart_init();
#endif
#if CONFIG_CONSOLE_SERIAL8250MEM
- serial8250mem_base_address = uart_mem_init();
+ uart_init();
#endif
#else
console_loglevel = 1;
diff --git a/src/drivers/oxford/oxpcie/Makefile.inc b/src/drivers/oxford/oxpcie/Makefile.inc
index 6cc29c4d13..1922425fd9 100644
--- a/src/drivers/oxford/oxpcie/Makefile.inc
+++ b/src/drivers/oxford/oxpcie/Makefile.inc
@@ -1,5 +1,4 @@
-ramstage-$(CONFIG_DRIVERS_OXFORD_OXPCIE) += oxpcie.c
-
ifeq ($(CONFIG_CONSOLE_SERIAL8250MEM),y)
-romstage-$(CONFIG_DRIVERS_OXFORD_OXPCIE) += oxpcie_early.c
+ramstage-y += oxpcie_early.c oxpcie.c
+romstage-y += oxpcie_early.c
endif
diff --git a/src/drivers/oxford/oxpcie/oxpcie.c b/src/drivers/oxford/oxpcie/oxpcie.c
index 26d29f858b..76119d2702 100644
--- a/src/drivers/oxford/oxpcie/oxpcie.c
+++ b/src/drivers/oxford/oxpcie/oxpcie.c
@@ -22,7 +22,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <console/console.h>
-#include <uart8250.h>
+#include <console/uart.h>
#include <arch/io.h>
static void oxford_oxpcie_enable(device_t dev)
@@ -47,10 +47,9 @@ static void oxford_oxpcie_set_resources(struct device *dev)
{
pci_dev_set_resources(dev);
-#if CONFIG_CONSOLE_SERIAL8250MEM
/* Re-initialize OXPCIe base address after set_resources */
- uartmem_init();
-#endif
+ u32 mmio_base = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
+ oxford_remap(mmio_base & ~0xf);
}
static struct device_operations oxford_oxpcie_ops = {
diff --git a/src/drivers/oxford/oxpcie/oxpcie_early.c b/src/drivers/oxford/oxpcie/oxpcie_early.c
index edb0523e52..d7f473ed78 100644
--- a/src/drivers/oxford/oxpcie/oxpcie_early.c
+++ b/src/drivers/oxford/oxpcie/oxpcie_early.c
@@ -17,14 +17,20 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#define __SIMPLE_DEVICE__
+
#include <stdint.h>
+#include <stddef.h>
#include <arch/io.h>
#include <arch/early_variables.h>
#include <delay.h>
#include <console/uart.h>
-#include <uart8250.h>
#include <device/pci_def.h>
+static unsigned int oxpcie_present CAR_GLOBAL;
+static ROMSTAGE_CONST u32 uart0_base = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000;
+static ROMSTAGE_CONST u32 uart1_base = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x2000;
+
#define PCIE_BRIDGE \
PCI_DEV(CONFIG_OXFORD_OXPCIE_BRIDGE_BUS, \
CONFIG_OXFORD_OXPCIE_BRIDGE_DEVICE, \
@@ -36,13 +42,9 @@
#define OXPCIE_DEVICE_3 \
PCI_DEV(CONFIG_OXFORD_OXPCIE_BRIDGE_SUBORDINATE, 0, 3)
-#if defined(__PRE_RAM__)
-int oxford_oxpcie_present CAR_GLOBAL;
-
-void oxford_init(void)
+static void oxpcie_init_bridge(void)
{
u16 reg16;
- oxford_oxpcie_present = 1;
/* First we reset the secondary bus */
reg16 = pci_read_config16(PCIE_BRIDGE, PCI_BRIDGE_CONTROL);
@@ -101,7 +103,6 @@ void oxford_init(void)
break;
default:
/* No UART here. */
- oxford_oxpcie_present = 0;
return;
}
@@ -114,17 +115,42 @@ void oxford_init(void)
reg16 |= PCI_COMMAND_MEMORY;
pci_write_config16(device, PCI_COMMAND, reg16);
- /* Now the UART initialization */
- u32 uart0_base = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000;
+ car_set_var(oxpcie_present, 1);
+}
+
+static int oxpcie_uart_active(void)
+{
+ return (car_get_var(oxpcie_present));
+}
+
+unsigned int uart_platform_base(int idx)
+{
+ if (idx == 0 && oxpcie_uart_active())
+ return uart0_base;
+ if (idx == 1 && oxpcie_uart_active())
+ return uart1_base;
+ return 0;
+}
- unsigned int div = uart_baudrate_divisor(default_baudrate(),
- uart_platform_refclk(), 16);
- uart8250_mem_init(uart0_base, div);
+#ifndef __PRE_RAM__
+void oxford_remap(u32 new_base)
+{
+ uart0_base = new_base + 0x1000;
+ uart1_base = new_base + 0x2000;
}
+uint32_t uartmem_getbaseaddr(void)
+{
+ return uart_platform_base(0);
+}
#endif
unsigned int uart_platform_refclk(void)
{
return 62500000;
}
+
+void oxford_init(void)
+{
+ oxpcie_init_bridge();
+}
diff --git a/src/include/console/uart.h b/src/include/console/uart.h
index 8aa8ea24ce..17811cab4c 100644
--- a/src/include/console/uart.h
+++ b/src/include/console/uart.h
@@ -43,8 +43,10 @@ void uart_tx_flush(void);
unsigned char uart_rx_byte(void);
int uart_can_rx_byte(void);
+unsigned int uart_platform_base(int idx);
uint32_t uartmem_getbaseaddr(void);
void oxford_init(void);
+void oxford_remap(unsigned int new_base);
#endif /* CONSOLE_UART_H */
diff --git a/src/include/uart8250.h b/src/include/uart8250.h
index 100a216257..c63153c632 100644
--- a/src/include/uart8250.h
+++ b/src/include/uart8250.h
@@ -105,21 +105,4 @@
#define UART_SCR 0x07
#define UART_SPR 0x07
-#if CONFIG_CONSOLE_SERIAL8250MEM
-void uartmem_init(void);
-
-/* and the same for memory mapped uarts */
-unsigned char uart8250_mem_rx_byte(unsigned base_port);
-int uart8250_mem_can_rx_byte(unsigned base_port);
-void uart8250_mem_tx_byte(unsigned base_port, unsigned char data);
-void uart8250_mem_tx_flush(unsigned base_port);
-void uart8250_mem_init(unsigned base_port, unsigned divisor);
-u32 uart_mem_init(void);
-
-#if defined(__PRE_RAM__) && CONFIG_DRIVERS_OXFORD_OXPCIE
-/* and special init for OXPCIe based cards */
-extern int oxford_oxpcie_present;
-#endif
-#endif
-
#endif /* UART8250_H */
diff --git a/src/lib/uart8250mem.c b/src/lib/uart8250mem.c
index f35da05ae5..ce45de9c10 100644
--- a/src/lib/uart8250mem.c
+++ b/src/lib/uart8250mem.c
@@ -33,42 +33,32 @@
#define SINGLE_CHAR_TIMEOUT (50 * 1000)
#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT)
-static inline int uart8250_mem_can_tx_byte(unsigned base_port)
+static int uart8250_mem_can_tx_byte(unsigned base_port)
{
return read8(base_port + UART_LSR) & UART_LSR_THRE;
}
-static inline void uart8250_mem_wait_to_tx_byte(unsigned base_port)
+static void uart8250_mem_tx_byte(unsigned base_port, unsigned char data)
{
unsigned long int i = SINGLE_CHAR_TIMEOUT;
while(i-- && !uart8250_mem_can_tx_byte(base_port))
udelay(1);
+ write8(base_port + UART_TBR, data);
}
-static inline void uart8250_mem_wait_until_sent(unsigned base_port)
+static void uart8250_mem_tx_flush(unsigned base_port)
{
unsigned long int i = FIFO_TIMEOUT;
while(i-- && !(read8(base_port + UART_LSR) & UART_LSR_TEMT))
udelay(1);
}
-void uart8250_mem_tx_byte(unsigned base_port, unsigned char data)
-{
- uart8250_mem_wait_to_tx_byte(base_port);
- write8(base_port + UART_TBR, data);
-}
-
-void uart8250_mem_tx_flush(unsigned base_port)
-{
- uart8250_mem_wait_until_sent(base_port);
-}
-
-int uart8250_mem_can_rx_byte(unsigned base_port)
+static int uart8250_mem_can_rx_byte(unsigned base_port)
{
return read8(base_port + UART_LSR) & UART_LSR_DR;
}
-unsigned char uart8250_mem_rx_byte(unsigned base_port)
+static unsigned char uart8250_mem_rx_byte(unsigned base_port)
{
unsigned long int i = SINGLE_CHAR_TIMEOUT;
while(i-- && !uart8250_mem_can_rx_byte(base_port))
@@ -79,7 +69,7 @@ unsigned char uart8250_mem_rx_byte(unsigned base_port)
return 0x0;
}
-void uart8250_mem_init(unsigned base_port, unsigned divisor)
+static void uart8250_mem_init(unsigned base_port, unsigned divisor)
{
/* Disable interrupts */
write8(base_port + UART_IER, 0x0);
@@ -99,36 +89,45 @@ void uart8250_mem_init(unsigned base_port, unsigned divisor)
write8(base_port + UART_LCR, CONFIG_TTYS0_LCS);
}
-u32 uart_mem_init(void)
+void uart_init(void)
{
- u32 uart_bar = 0;
- unsigned div;
-
- /* Now find the UART base address and calculate the divisor */
-#if CONFIG_DRIVERS_OXFORD_OXPCIE
-#if defined(MORE_TESTING) && !defined(__SIMPLE_DEVICE__)
- device_t dev = dev_find_device(0x1415, 0xc158, NULL);
- if (!dev)
- dev = dev_find_device(0x1415, 0xc11b, NULL);
-
- if (dev) {
- struct resource *res = find_resource(dev, 0x10);
-
- if (res) {
- uart_bar = res->base + 0x1000; // for 1st UART
- // uart_bar = res->base + 0x2000; // for 2nd UART
- }
- }
-
- if (!uart_bar)
-#endif
- uart_bar = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000; // 1st UART
- // uart_bar = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x2000; // 2nd UART
-#endif
+ u32 base = uart_platform_base(0);
+ if (!base)
+ return;
+ unsigned int div;
div = uart_baudrate_divisor(default_baudrate(), uart_platform_refclk(), 16);
- if (uart_bar)
- uart8250_mem_init(uart_bar, div);
+ uart8250_mem_init(base, div);
+}
- return uart_bar;
+void uart_tx_byte(unsigned char data)
+{
+ u32 base = uart_platform_base(0);
+ if (!base)
+ return;
+ uart8250_mem_tx_byte(base, data);
+}
+
+unsigned char uart_rx_byte(void)
+{
+ u32 base = uart_platform_base(0);
+ if (!base)
+ return 0xff;
+ return uart8250_mem_rx_byte(base);
+}
+
+int uart_can_rx_byte(void)
+{
+ u32 base = uart_platform_base(0);
+ if (!base)
+ return 0;
+ return uart8250_mem_can_rx_byte(base);
+}
+
+void uart_tx_flush(void)
+{
+ u32 base = uart_platform_base(0);
+ if (!base)
+ return;
+ uart8250_mem_tx_flush(base);
}