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authorArthur Heymans <arthur@aheymans.xyz>2016-10-27 00:34:18 +0200
committerMartin Roth <martinroth@google.com>2016-11-08 23:39:22 +0100
commit306521b82ef522c1df876b229d462359e920d8ef (patch)
treedf29b3e5ea020a365fd5868a42784344a43205fe
parentbe913983534a340cce81ad9da084abec9ff6311b (diff)
downloadcoreboot-306521b82ef522c1df876b229d462359e920d8ef.tar.xz
cpu/intel/socket_mPGA478MN: Add socket P
This mobile CPU socket supports model_6fx and model_1067x. Change-Id: Iecd6aae22831de7c3810545f0cb0be9738f96a2d Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/17154 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins)
-rw-r--r--src/cpu/intel/Kconfig1
-rw-r--r--src/cpu/intel/Makefile.inc1
-rw-r--r--src/cpu/intel/socket_mPGA478MN/Kconfig18
-rw-r--r--src/cpu/intel/socket_mPGA478MN/Makefile.inc14
4 files changed, 34 insertions, 0 deletions
diff --git a/src/cpu/intel/Kconfig b/src/cpu/intel/Kconfig
index 806a08ec6e..5df8002715 100644
--- a/src/cpu/intel/Kconfig
+++ b/src/cpu/intel/Kconfig
@@ -31,6 +31,7 @@ source src/cpu/intel/socket_FCBGA559/Kconfig
source src/cpu/intel/socket_mFCBGA479/Kconfig
source src/cpu/intel/socket_mFCPGA478/Kconfig
source src/cpu/intel/socket_mPGA478/Kconfig
+source src/cpu/intel/socket_mPGA478MN/Kconfig
source src/cpu/intel/socket_mPGA479M/Kconfig
source src/cpu/intel/socket_mPGA603/Kconfig
source src/cpu/intel/socket_mPGA604/Kconfig
diff --git a/src/cpu/intel/Makefile.inc b/src/cpu/intel/Makefile.inc
index 536b40e565..1874075c37 100644
--- a/src/cpu/intel/Makefile.inc
+++ b/src/cpu/intel/Makefile.inc
@@ -13,6 +13,7 @@ subdirs-$(CONFIG_CPU_INTEL_SOCKET_FCBGA559) += socket_FCBGA559
subdirs-$(CONFIG_CPU_INTEL_SOCKET_MFCBGA479) += socket_mFCBGA479
subdirs-$(CONFIG_CPU_INTEL_SOCKET_MFCPGA478) += socket_mFCPGA478
subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA478) += socket_mPGA478
+subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA478MN) += socket_mPGA478MN
subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA479M) += socket_mPGA479M
subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA603) += socket_mPGA603
subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA604) += socket_mPGA604
diff --git a/src/cpu/intel/socket_mPGA478MN/Kconfig b/src/cpu/intel/socket_mPGA478MN/Kconfig
new file mode 100644
index 0000000000..7c4dbc5b29
--- /dev/null
+++ b/src/cpu/intel/socket_mPGA478MN/Kconfig
@@ -0,0 +1,18 @@
+config CPU_INTEL_SOCKET_MPGA478MN
+ bool
+ select CPU_INTEL_MODEL_1067X
+ select CPU_INTEL_MODEL_6FX
+ select MMX
+ select SSE
+
+if CPU_INTEL_SOCKET_MPGA478MN
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xffaf8000
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x8000
+
+endif
diff --git a/src/cpu/intel/socket_mPGA478MN/Makefile.inc b/src/cpu/intel/socket_mPGA478MN/Makefile.inc
new file mode 100644
index 0000000000..407861e164
--- /dev/null
+++ b/src/cpu/intel/socket_mPGA478MN/Makefile.inc
@@ -0,0 +1,14 @@
+subdirs-y += ../model_6fx
+subdirs-y += ../model_1067x
+subdirs-y += ../../x86/tsc
+subdirs-y += ../../x86/mtrr
+subdirs-y += ../../x86/lapic
+subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/smm
+subdirs-y += ../microcode
+subdirs-y += ../hyperthreading
+subdirs-y += ../speedstep
+
+# Use Intel Core (not Core 2) code for CAR init, any CPU might be used.
+cpu_incs-y += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
+romstage-y += ../car/romstage.c