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authorFurquan Shaikh <furquan@google.com>2018-10-23 07:29:42 -0700
committerAaron Durbin <adurbin@chromium.org>2018-10-24 00:09:32 +0000
commit3487095304dbbbf66de86f8bce0e40b7acb3ea27 (patch)
treeedf55dcffc3a0c68c400c43d705a95d7cb340801
parent2ce56f152367de3b717658a1e848c4c1da2e23f0 (diff)
downloadcoreboot-3487095304dbbbf66de86f8bce0e40b7acb3ea27.tar.xz
mb/google/octopus: Use DIMM_INFO_PART_NUMBER_SIZE for part_num_store
This change uses DIMM_INFO_PART_NUMBER_SIZE to decide the size of part_num_store that holds the number of DRAM part. It ensures that host advertises the supported size to read part number from the EC. BUG=b:115697578 Change-Id: I8439a301fc037b0acdc8b1226ad04d2f363838ef Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/29241 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
-rw-r--r--src/mainboard/google/octopus/romstage.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/google/octopus/romstage.c b/src/mainboard/google/octopus/romstage.c
index 9e5734bb67..43349a0660 100644
--- a/src/mainboard/google/octopus/romstage.c
+++ b/src/mainboard/google/octopus/romstage.c
@@ -17,6 +17,7 @@
#include <boardid.h>
#include <console/console.h>
#include <ec/google/chromeec/ec.h>
+#include <memory_info.h>
#include <soc/meminit.h>
#include <soc/romstage.h>
@@ -33,7 +34,7 @@ static void save_dimm_info_by_sku_config(void)
void mainboard_save_dimm_info(void)
{
- char part_num_store[32];
+ char part_num_store[DIMM_INFO_PART_NUMBER_SIZE];
const char *part_num = NULL;
if (!IS_ENABLED(CONFIG_DRAM_PART_NUM_IN_CBI)) {