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authorzbao <fishbaozi@gmail.com>2012-08-03 15:44:42 +0800
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2012-08-04 05:41:27 +0200
commit49bb26a469c4e0dc4fd2414c11c9926046199730 (patch)
tree99ab37b56baf1e4b317b5b07a58bc193bf9c0781
parent9bf356fc53a2af90ad74550182dcd1b040e594df (diff)
downloadcoreboot-49bb26a469c4e0dc4fd2414c11c9926046199730.tar.xz
AMD NB: Limit the device field to 5 bits. (Propagation)
Apply the change http://review.coreboot.org/1264 to all the AMD northbridge. Change-Id: Ied74d6f579d2c0350288e2619d7810f8d44fa574 Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: zbao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/1403 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
-rw-r--r--src/northbridge/amd/agesa/family10/northbridge.c4
-rw-r--r--src/northbridge/amd/agesa/family12/northbridge.c6
-rw-r--r--src/northbridge/amd/agesa/family14/northbridge.c6
-rw-r--r--src/northbridge/amd/agesa/family15/northbridge.c4
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.c4
5 files changed, 16 insertions, 8 deletions
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c
index 831aec095c..8cc9475c45 100644
--- a/src/northbridge/amd/agesa/family10/northbridge.c
+++ b/src/northbridge/amd/agesa/family10/northbridge.c
@@ -361,8 +361,8 @@ static void set_mmio_addr_reg(u32 nodeid, u32 linkn, u32 reg, u32 index, u32 mmi
static device_t get_node_pci(u32 nodeid, u32 fn)
{
-#if NODE_NUMS == 64
- if (nodeid < 32) {
+#if NODE_NUMS + CONFIG_CDB >= 32
+ if ((CONFIG_CDB + nodeid) < 32) {
return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn));
} else {
return dev_find_slot(CONFIG_CBB-1, PCI_DEVFN(CONFIG_CDB + nodeid - 32, fn));
diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c
index f3f03a42b6..af1d4f064c 100644
--- a/src/northbridge/amd/agesa/family12/northbridge.c
+++ b/src/northbridge/amd/agesa/family12/northbridge.c
@@ -50,7 +50,11 @@ static unsigned fx_devs=0;
device_t get_node_pci(u32 nodeid, u32 fn)
{
- return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn));
+ if ((CONFIG_CDB + nodeid) < 32) {
+ return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn));
+ } else {
+ return dev_find_slot(CONFIG_CBB-1, PCI_DEVFN(CONFIG_CDB + nodeid - 32, fn));
+ }
}
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index af6dfcc297..a03939cde4 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -51,7 +51,11 @@ static unsigned fx_devs = 0;
device_t get_node_pci(u32 nodeid, u32 fn)
{
- return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn));
+ if ((CONFIG_CDB + nodeid) < 32) {
+ return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn));
+ } else {
+ return dev_find_slot(CONFIG_CBB-1, PCI_DEVFN(CONFIG_CDB + nodeid - 32, fn));
+ }
}
static void get_fx_devs(void)
diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c
index a080293503..8d64a3068b 100644
--- a/src/northbridge/amd/agesa/family15/northbridge.c
+++ b/src/northbridge/amd/agesa/family15/northbridge.c
@@ -122,8 +122,8 @@ static void set_mmio_addr_reg(u32 nodeid, u32 linkn, u32 reg, u32 index, u32 mmi
static device_t get_node_pci(u32 nodeid, u32 fn)
{
-#if MAX_NODE_NUMS == 64
- if (nodeid < 32) {
+#if MAX_NODE_NUMS + CONFIG_CDB >= 32
+ if ((CONFIG_CDB + nodeid) < 32) {
return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn));
} else {
return dev_find_slot(CONFIG_CBB-1, PCI_DEVFN(CONFIG_CDB + nodeid - 32, fn));
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 15b29f6574..aa15fdd6e5 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -63,8 +63,8 @@ static unsigned fx_devs=0;
device_t get_node_pci(u32 nodeid, u32 fn)
{
-#if NODE_NUMS == 64
- if(nodeid<32) {
+#if NODE_NUMS + CONFIG_CDB >= 32
+ if((CONFIG_CDB + nodeid) < 32) {
return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn));
} else {
return dev_find_slot(CONFIG_CBB-1, PCI_DEVFN(CONFIG_CDB + nodeid - 32, fn));