FSP 1.1: Bring source up-to-date

Use 3rdparty/blobs subdirectory for binary files
Display the MTRRs after TempRamExit and before the MTRR setup
Clear all of the variable MTRRs before the MTRR setup
Define the FSP attributes location and bits
Properly display the FSP_RESERVED_MEMORY_RESOURCE_HOB and the
FSP_BOOTLOADER_TOLUM_HOB.

BRANCH=none
BUG=None
TEST=Build and run on cyan

Change-Id: I788a5f1e7676b1a06c1bcd66ddbd0a2249cad47c
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10589
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

4 files changed, 53 insertions, 9 deletions

diff --git a/src/drivers/intel/fsp1_1/Kconfig b/src/drivers/intel/fsp1_1/Kconfig
index f722e65b32..ec5112d002 100644
--- a/src/drivers/intel/fsp1_1/Kconfig
+++ b/src/drivers/intel/fsp1_1/Kconfig
@@ -205,6 +205,6 @@ config USE_GENERIC_FSP_CAR_INC
 config VBT_FILE
 	string "GOP Video BIOS table binary path"
 	depends on GOP_SUPPORT
-	default "3rdparty/mainboard/$(MAINBOARDDIR)/vbt.bin"
+	default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/vbt.bin"
 
 endif #PLATFORM_USES_FSP1_1
diff --git a/src/drivers/intel/fsp1_1/cache_as_ram.inc b/src/drivers/intel/fsp1_1/cache_as_ram.inc
index 4a0827d2df..f56d841380 100644
--- a/src/drivers/intel/fsp1_1/cache_as_ram.inc
+++ b/src/drivers/intel/fsp1_1/cache_as_ram.inc
@@ -204,12 +204,51 @@ before_romstage:
 	cmp	$0, %eax
 	jne	halt3
 
-	/* Get number of MTRRs. */
+	/* Display the MTRRs */
+	call	soc_display_mtrrs
+
+	/*
+	 * The stack contents are initialized in src/soc/intel/common/stack.c
+	 * to be the following:
+	 *
+	 *		*
+	 *		*
+	 *		*
+	 *  +36: MTRR mask 1 63:32
+	 *  +32: MTRR mask 1 31:0
+	 *  +28: MTRR base 1 63:32
+	 *  +24: MTRR base 1 31:0
+	 *  +20: MTRR mask 0 63:32
+	 *  +16: MTRR mask 0 31:0
+	 *  +12: MTRR base 0 63:32
+	 *   +8: MTRR base 0 31:0
+	 *   +4: Number of MTRRs to setup (described above)
+	 *   +0: Number of variable MTRRs to clear
+	 */
+
+	/* Clear all of the variable MTRRs. */
 	popl	%ebx
 	movl	$MTRRphysBase_MSR(0), %ecx
+	clr	%eax
+	clr	%edx
+
 1:
 	testl	%ebx, %ebx
 	jz	1f
+	wrmsr			/* Write MTRR base. */
+	inc	%ecx
+	wrmsr			/* Write MTRR mask. */
+	inc	%ecx
+	dec	%ebx
+	jmp	1b
+
+1:
+	/* Get number of MTRRs. */
+	popl	%ebx
+	movl	$MTRRphysBase_MSR(0), %ecx
+2:
+	testl	%ebx, %ebx
+	jz	2f
 
 	/* Low 32 bits of MTRR base. */
 	popl	%eax
@@ -227,8 +266,8 @@ before_romstage:
 	inc	%ecx
 
 	dec	%ebx
-	jmp	1b
-1:
+	jmp	2b
+2:
 	post_code(0x39)
 
 	/* And enable cache again after setting MTRRs. */
diff --git a/src/drivers/intel/fsp1_1/fsp_util.h b/src/drivers/intel/fsp1_1/fsp_util.h
index 38fa86211b..618317ba69 100644
--- a/src/drivers/intel/fsp1_1/fsp_util.h
+++ b/src/drivers/intel/fsp1_1/fsp_util.h
@@ -37,7 +37,7 @@
 #define GetFirstGuidHob	get_first_guid_hob
 
 /* Include the EDK2 headers */
-#include <chipset_fsp_util.h>
+#include <soc/chipset_fsp_util.h>
 
 #if IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)
 int save_mrc_data(void *hob_start);
@@ -104,6 +104,8 @@ void update_mrc_cache(void *unused);
 #define FSP_IMAGE_SIG_LOC			0
 #define FSP_IMAGE_ID_LOC			16
 #define FSP_IMAGE_BASE_LOC			28
+#define FSP_IMAGE_ATTRIBUTE_LOC			32
+#define  GRAPHICS_SUPPORT_BIT			(1 << 0)
 
 #define FSP_SIG					0x48505346	/* 'FSPH' */
 
diff --git a/src/drivers/intel/fsp1_1/hob.c b/src/drivers/intel/fsp1_1/hob.c
index 905d3ec1ab..6cc09fbcc4 100644
--- a/src/drivers/intel/fsp1_1/hob.c
+++ b/src/drivers/intel/fsp1_1/hob.c
@@ -294,6 +294,7 @@ static const char *get_hob_type_string(void *hob_ptr)
 		FSP_BOOTLOADER_TEMP_MEMORY_HOB_GUID;
 	const EFI_GUID bootldr_tolum_guid = FSP_BOOTLOADER_TOLUM_HOB_GUID;
 	const EFI_GUID graphics_info_guid = EFI_PEI_GRAPHICS_INFO_HOB_GUID;
+	const EFI_GUID memory_info_hob_guid = FSP_SMBIOS_MEMORY_INFO_GUID;
 
 	hob.Header = (EFI_HOB_GENERIC_HEADER *)hob_ptr;
 	switch (hob.Header->HobType) {
@@ -305,19 +306,21 @@ static const char *get_hob_type_string(void *hob_ptr)
 		break;
 	case EFI_HOB_TYPE_RESOURCE_DESCRIPTOR:
 		hob_type_string = "EFI_HOB_TYPE_RESOURCE_DESCRIPTOR";
+		if (compare_guid(&fsp_reserved_guid, &hob.Guid->Name))
+			hob_type_string = "FSP_RESERVED_MEMORY_RESOURCE_HOB";
+		else if (compare_guid(&bootldr_tolum_guid, &hob.Guid->Name))
+			hob_type_string = "FSP_BOOTLOADER_TOLUM_HOB_GUID";
 		break;
 	case EFI_HOB_TYPE_GUID_EXTENSION:
 		hob_type_string = "EFI_HOB_TYPE_GUID_EXTENSION";
 		if (compare_guid(&bootldr_tmp_mem_guid, &hob.Guid->Name))
 			hob_type_string = "FSP_BOOTLOADER_TEMP_MEMORY_HOB";
-		else if (compare_guid(&fsp_reserved_guid, &hob.Guid->Name))
-			hob_type_string = "FSP_RESERVED_MEMORY_RESOURCE_HOB";
 		else if (compare_guid(&mrc_guid, &hob.Guid->Name))
 			hob_type_string = "FSP_NON_VOLATILE_STORAGE_HOB";
-		else if (compare_guid(&bootldr_tolum_guid, &hob.Guid->Name))
-			hob_type_string = "FSP_BOOTLOADER_TOLUM_HOB_GUID";
 		else if (compare_guid(&graphics_info_guid, &hob.Guid->Name))
 			hob_type_string = "EFI_PEI_GRAPHICS_INFO_HOB_GUID";
+		else if (compare_guid(&memory_info_hob_guid, &hob.Guid->Name))
+			hob_type_string = "FSP_SMBIOS_MEMORY_INFO_GUID";
 		break;
 	case EFI_HOB_TYPE_MEMORY_POOL:
 		hob_type_string = "EFI_HOB_TYPE_MEMORY_POOL";