diff options
| author | Stefan Reinauer <reinauer@chromium.org> | 2012-07-26 15:02:49 -0700 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2012-07-27 17:48:07 +0200 |
| commit | 4b80cd45c3810663700a174a3514220305887b0e (patch) | |
| tree | a8c2164a09ddd542195532b8fd2924a0a050bac0 | |
| parent | 6ff1d36a4762365cdbc109d0c07778bfdd56dbaf (diff) | |
| download | coreboot-4b80cd45c3810663700a174a3514220305887b0e.tar.xz | |
x86emu: Fix BSF and BSR instructions
Patch courtesy of Michael Yaroslavtsev.
Synced from Xorg
http://cgit.freedesktop.org/xorg/xserver/commit/?id=66fa87292ef26bd0f464481287f3af992cd5741c
Change-Id: I266f910d4a535eab4e2ad77f2540f2f1495bed61
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1360
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
| -rw-r--r-- | src/devices/oprom/x86emu/ops2.c | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/src/devices/oprom/x86emu/ops2.c b/src/devices/oprom/x86emu/ops2.c index 4c3d0aa083..95ec09a317 100644 --- a/src/devices/oprom/x86emu/ops2.c +++ b/src/devices/oprom/x86emu/ops2.c @@ -1495,7 +1495,7 @@ static void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2)) uint srcoffset; START_OF_INSTR(); - DECODE_PRINTF("BSF\n"); + DECODE_PRINTF("BSF\t"); FETCH_DECODE_MODRM(mod, rh, rl); if (mod < 3) { srcoffset = decode_rmXX_address(mod, rl); @@ -1521,25 +1521,25 @@ static void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2)) } } else { /* register to register */ if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *srcreg, *dstreg; + u32 srcval, *dstreg; - srcreg = DECODE_RM_LONG_REGISTER(rl); + srcval = *DECODE_RM_LONG_REGISTER(rl); DECODE_PRINTF(","); dstreg = DECODE_RM_LONG_REGISTER(rh); TRACE_AND_STEP(); - CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF); + CONDITIONAL_SET_FLAG(srcval == 0, F_ZF); for(*dstreg = 0; *dstreg < 32; (*dstreg)++) - if ((*srcreg >> *dstreg) & 1) break; + if ((srcval >> *dstreg) & 1) break; } else { - u16 *srcreg, *dstreg; + u16 srcval, *dstreg; - srcreg = DECODE_RM_WORD_REGISTER(rl); + srcval = *DECODE_RM_WORD_REGISTER(rl); DECODE_PRINTF(","); dstreg = DECODE_RM_WORD_REGISTER(rh); TRACE_AND_STEP(); - CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF); + CONDITIONAL_SET_FLAG(srcval == 0, F_ZF); for(*dstreg = 0; *dstreg < 16; (*dstreg)++) - if ((*srcreg >> *dstreg) & 1) break; + if ((srcval >> *dstreg) & 1) break; } } DECODE_CLEAR_SEGOVR(); @@ -1556,7 +1556,7 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2)) uint srcoffset; START_OF_INSTR(); - DECODE_PRINTF("BSF\n"); + DECODE_PRINTF("BSR\t"); FETCH_DECODE_MODRM(mod, rh, rl); if (mod < 3) { srcoffset = decode_rmXX_address(mod, rl); @@ -1582,25 +1582,25 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2)) } } else { /* register to register */ if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *srcreg, *dstreg; + u32 srcval, *dstreg; - srcreg = DECODE_RM_LONG_REGISTER(rl); + srcval = *DECODE_RM_LONG_REGISTER(rl); DECODE_PRINTF(","); dstreg = DECODE_RM_LONG_REGISTER(rh); TRACE_AND_STEP(); - CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF); + CONDITIONAL_SET_FLAG(srcval == 0, F_ZF); for(*dstreg = 31; *dstreg > 0; (*dstreg)--) - if ((*srcreg >> *dstreg) & 1) break; + if ((srcval >> *dstreg) & 1) break; } else { - u16 *srcreg, *dstreg; + u16 srcval, *dstreg; - srcreg = DECODE_RM_WORD_REGISTER(rl); + srcval = *DECODE_RM_WORD_REGISTER(rl); DECODE_PRINTF(","); dstreg = DECODE_RM_WORD_REGISTER(rh); TRACE_AND_STEP(); - CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF); + CONDITIONAL_SET_FLAG(srcval == 0, F_ZF); for(*dstreg = 15; *dstreg > 0; (*dstreg)--) - if ((*srcreg >> *dstreg) & 1) break; + if ((srcval >> *dstreg) & 1) break; } } DECODE_CLEAR_SEGOVR(); |