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authorElyes HAOUAS <ehaouas@noos.fr>2019-05-25 19:38:03 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-06-03 13:30:12 +0000
commit4be1f8a2f6be29e7a9983d068c2356b7728f91d5 (patch)
treeaad2174c34835d7bcc1f9ebdc2908aa39548c99b
parent156936b7711457157078ced41ea87529cb65aa2e (diff)
downloadcoreboot-4be1f8a2f6be29e7a9983d068c2356b7728f91d5.tar.xz
sb/nvidia/mcp55: Remove variable set but not used
Change-Id: Ic8f6c264aedbdab0eacb6a99a32cc90336e08d84 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33011 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/southbridge/nvidia/mcp55/lpc.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/southbridge/nvidia/mcp55/lpc.c b/src/southbridge/nvidia/mcp55/lpc.c
index 1aef631ee6..6416dd37b0 100644
--- a/src/southbridge/nvidia/mcp55/lpc.c
+++ b/src/southbridge/nvidia/mcp55/lpc.c
@@ -100,10 +100,9 @@ static void lpc_init(struct device *dev)
get_option(&on, "slow_cpu");
if (on) {
u16 pm10_bar;
- u32 dword;
pm10_bar = (pci_read_config16(dev, 0x60) & 0xff00);
outl(((on << 1) + 0x10), (pm10_bar + 0x10));
- dword = inl(pm10_bar + 0x10);
+ inl(pm10_bar + 0x10);
on = 8 - on;
printk(BIOS_DEBUG, "Throttling CPU %2d.%1.1d percent.\n",
(on * 12) + (on >> 1), (on & 1) * 5);