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authorEric Biederman <ebiederm@xmission.com>2003-07-12 01:46:53 +0000
committerEric Biederman <ebiederm@xmission.com>2003-07-12 01:46:53 +0000
commit548593ad666065a5f63216aebb0176b82e82fda6 (patch)
tree84ea247a8bbc86b4ff5bea714d121395a23f3657
parentbd537be3d295f95417a2be6de3e1f4121c7a24a2 (diff)
downloadcoreboot-548593ad666065a5f63216aebb0176b82e82fda6.tar.xz
- generalize generic_sdram.c
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/sdram/generic_sdram.c15
1 files changed, 4 insertions, 11 deletions
diff --git a/src/sdram/generic_sdram.c b/src/sdram/generic_sdram.c
index be5ae87407..7bd801a926 100644
--- a/src/sdram/generic_sdram.c
+++ b/src/sdram/generic_sdram.c
@@ -7,29 +7,22 @@ void sdram_no_memory(void)
}
/* Setup SDRAM */
-void sdram_initialize(void)
+void sdram_initialize(const struct mem_controller *ctrl)
{
print_debug("Ram1\r\n");
/* Set the registers we can set once to reasonable values */
- sdram_set_registers();
+ sdram_set_registers(ctrl);
print_debug("Ram2\r\n");
/* Now setup those things we can auto detect */
- sdram_set_spd_registers();
+ sdram_set_spd_registers(ctrl);
print_debug("Ram3\r\n");
/* Now that everything is setup enable the SDRAM.
* Some chipsets do the work for use while on others
* we need to it by hand.
*/
- sdram_enable();
+ sdram_enable(ctrl);
print_debug("Ram4\r\n");
- sdram_first_normal_reference();
-
- print_debug("Ram5\r\n");
- sdram_enable_refresh();
- sdram_special_finishup();
-
- print_debug("Ram6\r\n");
}