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authorVadim Bendebury <vbendeb@chromium.org>2016-05-22 16:00:05 -0700
committerMartin Roth <martinroth@google.com>2016-06-08 23:20:18 +0200
commit5554d1cf8a4209fa844ae487438030006623d702 (patch)
tree9e1b71da9d807149cea356bf9843948e257e91f8
parent993dbe1fc8d533b152737be72c2f95357464f35c (diff)
downloadcoreboot-5554d1cf8a4209fa844ae487438030006623d702.tar.xz
rk3399: add ability to configure SPI5
This defines mux settings for the GPIO bank responsible for SPI interface #5. BRANCH=none BUG=chrome-os-partner:51537 TEST=with the rest of the patches applied it is possible to communicate with the EC on gru: pressing Ctrl-U during boot allows to start Chrome OS from the SD card. Change-Id: Ibc2293b5662892f7b275434f9a672ef68edf4f9e Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: 4f92452 Original-Change-Id: Idf55c069b05492f8cdc204a8c273e39a19a3aef3 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/346630 Original-Tested-by: Shunqian Zheng <zhengsq@rock-chips.com> Reviewed-on: https://review.coreboot.org/15030 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
-rw-r--r--src/soc/rockchip/rk3399/include/soc/grf.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/soc/rockchip/rk3399/include/soc/grf.h b/src/soc/rockchip/rk3399/include/soc/grf.h
index 241c97f00b..aec9248fd6 100644
--- a/src/soc/rockchip/rk3399/include/soc/grf.h
+++ b/src/soc/rockchip/rk3399/include/soc/grf.h
@@ -123,7 +123,10 @@ struct rk3399_grf_regs {
u32 iomux_spi2;
u32 gpio2b_iomux;
};
- u32 gpio2c_iomux;
+ union {
+ u32 gpio2c_iomux;
+ u32 iomux_spi5;
+ };
u32 gpio2d_iomux;
u32 gpio3a_iomux;
u32 gpio3b_iomux;
@@ -337,6 +340,8 @@ static struct rk3399_pmusgrf_regs * const rk3399_pmusgrf = (void *)PMUSGRF_BASE;
#define IOMUX_SPI1_RX RK_CLRSETBITS(3 << 14, 2 << 14)
#define IOMUX_SPI1_CSCLKTX RK_CLRSETBITS(0x3f << 0, 2 << 4 |\
2 << 2 | 2 << 0)
+#define IOMUX_SPI5 RK_CLRSETBITS(0xff << 8, \
+ 2 << 14 | 2 << 12 | 2 << 10 | 2 << 8)
#define IOMUX_SDMMC RK_CLRSETBITS(0xfff, 1 << 10 | 1 << 8 | 1 << 6 |\
1 << 4 | 1 << 2 | 1 << 0)
#define IOMUX_I2C0_SCL RK_CLRSETBITS(3 << 0, 2 << 0)