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authorNico Huber <nico.huber@secunet.com>2015-12-30 00:17:27 +0100
committerMartin Roth <martinroth@google.com>2015-12-31 17:45:09 +0100
commit5aaeb27de97e2badba469229df9b2af9e33619e4 (patch)
treeb6304696f85deabbda13dbdb3a92be392ee96301
parent0a207399ce604c57326069b5202544d58ee4a120 (diff)
downloadcoreboot-5aaeb27de97e2badba469229df9b2af9e33619e4.tar.xz
nb/intel/gm45: Export low-power and (SFF) options
Make the low-power and small form factor (SFF) options overridable from romstage main. Also disable both options by default. That's ok as there aren't yet any in-tree users of the GS45 chipset. As a nice side-effect, this adds X200s support to the lenovo/x200 port. Change-Id: I94373851262e6d424cf4885ceca7260c31bc9f61 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/12814 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
-rw-r--r--src/northbridge/intel/gm45/gm45.h4
-rw-r--r--src/northbridge/intel/gm45/raminit.c13
2 files changed, 9 insertions, 8 deletions
diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h
index ded2dbf1e1..c0183219eb 100644
--- a/src/northbridge/intel/gm45/gm45.h
+++ b/src/northbridge/intel/gm45/gm45.h
@@ -130,7 +130,6 @@ typedef struct {
int txt_enabled;
int cores;
gmch_gfx_t gfx_type;
- int gs45_low_power_mode; /* low power mode of GMCH_GS45 */
int max_ddr2_mhz;
int max_ddr3_mt;
fsb_clock_t max_fsb;
@@ -140,10 +139,13 @@ typedef struct {
int enable_peg;
u16 ggc;
+ /* to be filled in romstage main: */
int spd_type;
timings_t selected_timings;
dimminfo_t dimms[2];
u8 spd_map[4];
+ int gs45_low_power_mode; /* low power mode of GMCH_GS45 */
+ int sff; /* small form factor option (soldered down DIMM) */
} sysinfo_t;
#define TOTAL_CHANNELS 2
#define CHANNEL_IS_POPULATED(dimms, idx) (dimms[idx].card_type != 0)
diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
index d4d00de683..ab54abc754 100644
--- a/src/northbridge/intel/gm45/raminit.c
+++ b/src/northbridge/intel/gm45/raminit.c
@@ -80,7 +80,6 @@ void get_gmch_info(sysinfo_t *sysinfo)
sysinfo->gfx_type = gmch_gfx_types[gfx_variant][render_freq];
else
sysinfo->gfx_type = GMCH_UNKNOWN;
- sysinfo->gs45_low_power_mode = 0;
switch (sysinfo->gfx_type) {
case GMCH_GM45:
printk(BIOS_SPEW, "GMCH: GM45\n");
@@ -104,8 +103,8 @@ void get_gmch_info(sysinfo_t *sysinfo)
printk(BIOS_SPEW, "GMCH: GS40\n");
break;
case GMCH_GS45:
- printk(BIOS_SPEW, "GMCH: GS45, using low power mode by default\n");
- sysinfo->gs45_low_power_mode = 1;
+ printk(BIOS_SPEW, "GMCH: GS45, using %s-power mode\n",
+ sysinfo->gs45_low_power_mode ? "low" : "high");
break;
case GMCH_PM45:
printk(BIOS_SPEW, "GMCH: PM45\n");
@@ -1688,7 +1687,6 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
{
const dimminfo_t *const dimms = sysinfo->dimms;
const timings_t *const timings = &sysinfo->selected_timings;
- const int sff = sysinfo->gfx_type == GMCH_GS45;
int ch;
u8 reg8;
@@ -1730,7 +1728,7 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
configure_dram_control_mode(timings, dimms);
/* Initialize RCOMP. */
- rcomp_initialization(sysinfo->stepping, sff);
+ rcomp_initialization(sysinfo->stepping, sysinfo->sff);
/* Power-up DRAM. */
dram_powerup(s3resume);
@@ -1743,7 +1741,7 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
MCHBAR32(CxDCLKDIS_MCHBAR(ch)) |= CxDCLKDIS_ENABLE;
/* Enable On-Die Termination. */
- odt_setup(timings, sff);
+ odt_setup(timings, sysinfo->sff);
/* Miscellaneous settings. */
misc_settings(timings, sysinfo->stepping);
/* Program clock crossing registers. */
@@ -1751,7 +1749,8 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
/* Program egress VC1 timings. */
vc1_program_timings(timings->fsb_clock);
/* Perform system-memory i/o initialization. */
- memory_io_init(timings->mem_clock, dimms, sysinfo->stepping, sff);
+ memory_io_init(timings->mem_clock, dimms,
+ sysinfo->stepping, sysinfo->sff);
/* Initialize memory map with dummy values of 128MB per rank with a
page size of 4KB. This makes the JEDEC initialization code easier. */