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authorDavid Wu <david_wu@quantatw.com>2017-12-11 14:40:36 +0800
committerFurquan Shaikh <furquan@google.com>2017-12-19 02:29:15 +0000
commit5f7fa726a839ba045192719a0282ca3c1ecd59d2 (patch)
tree043c3984896dcfa2c3731e33e9b95b1a5f8c4c8b
parent668dea0928fb72ea5778097ac40cac2d5ffb3bb9 (diff)
downloadcoreboot-5f7fa726a839ba045192719a0282ca3c1ecd59d2.tar.xz
mb/google/fizz: Enable 2nd NIC leds
This patch enables customized NIC leds as below: Green Orange (Amber) 100M off blinking 1000M on blinking BUG=b:69950854 TEST=Boot on fizz dut and observe the LEDs are behaving as expected. Perform suspend/resume test and the LEDs are still working as expected. Change-Id: Ic70587a0cd688e74b5e1ce532c5da954c80cf841 Signed-off-by: David Wu <david_wu@quantatw.com> Reviewed-on: https://review.coreboot.org/22817 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Gaggery Tsai <gaggery.tsai@intel.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
-rw-r--r--src/mainboard/google/fizz/devicetree.cb7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/devicetree.cb
index 25eda89629..18031d67cd 100644
--- a/src/mainboard/google/fizz/devicetree.cb
+++ b/src/mainboard/google/fizz/devicetree.cb
@@ -309,7 +309,12 @@ chip soc/intel/skylake
device pci 1c.5 off end # PCI Express Port 6
device pci 1c.6 off end # PCI Express Port 7
device pci 1c.7 off end # PCI Express Port 8
- device pci 1d.0 on end # PCI Express Port 9 for BtoB
+ device pci 1d.0 on # PCI Express Port 9 for 2nd LAN
+ chip drivers/net
+ register "customized_leds" = "0x0fa7"
+ device pci 00.0 on end
+ end
+ end # PCI Express Port 9 for BtoB
device pci 1d.1 off end # PCI Express Port 10
device pci 1d.2 off end # PCI Express Port 11
device pci 1d.3 off end # PCI Express Port 12