diff options
| author | Nico Huber <nico.huber@secunet.com> | 2017-06-28 16:42:51 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2017-06-29 15:41:02 +0000 |
| commit | 5f9c6734fc9bbe69c007c46c8ec6f314bd5522a8 (patch) | |
| tree | 8f8ae84291f503c88a92103e5c528b7b0d284b46 | |
| parent | 956cfa307b59ff035f47a6bf4b21456963991839 (diff) | |
| download | coreboot-5f9c6734fc9bbe69c007c46c8ec6f314bd5522a8.tar.xz | |
lib/spd_bin: Use proper I2C addresses
Use the plain address instead of the weird shifted encoding (e.g. if
we'd use `0xa0` as address, it's actually `0x50` encoded into a write
command).
Change-Id: I6febb2e04e1c6de4294dfa37bde16b147a80b7a8
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20405
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
| -rw-r--r-- | src/include/spd_bin.h | 2 | ||||
| -rw-r--r-- | src/lib/spd_bin.c | 2 | ||||
| -rw-r--r-- | src/mainboard/google/fizz/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/intel/kblrvp/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/purism/librem13v2/romstage.c | 2 |
5 files changed, 4 insertions, 6 deletions
diff --git a/src/include/spd_bin.h b/src/include/spd_bin.h index 3783fafb4c..e0a50ff45b 100644 --- a/src/include/spd_bin.h +++ b/src/include/spd_bin.h @@ -43,7 +43,7 @@ #define LPDDR4_SPD_PART_LEN 20 struct spd_block { - u8 addr_map[CONFIG_DIMM_MAX]; + u8 addr_map[CONFIG_DIMM_MAX]; /* 7 bit I2C addresses */ u8 *spd_array[CONFIG_DIMM_MAX]; /* Length of each dimm */ u16 len; diff --git a/src/lib/spd_bin.c b/src/lib/spd_bin.c index a9f6a36045..b5ab9b7db1 100644 --- a/src/lib/spd_bin.c +++ b/src/lib/spd_bin.c @@ -128,8 +128,6 @@ int get_spd_cbfs_rdev(struct region_device *spd_rdev, u8 spd_index) static void get_spd(u8 *spd, u8 addr) { u16 i; - /* Assuming addr is 8 bit address, make it 7 bit */ - addr = addr >> 1; if (smbus_read_byte(0, addr, 0) == 0xff) { printk(BIOS_INFO, "No memory dimm at address %02X\n", addr << 1); diff --git a/src/mainboard/google/fizz/romstage.c b/src/mainboard/google/fizz/romstage.c index 4c816df55f..065ecd3a8a 100644 --- a/src/mainboard/google/fizz/romstage.c +++ b/src/mainboard/google/fizz/romstage.c @@ -32,7 +32,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) /* Read spd block to get memory config */ struct spd_block blk = { - .addr_map = { 0xa0, 0xa4, }, + .addr_map = { 0x50, 0x52, }, }; mem_cfg->DqPinsInterleaved = 1; get_spd_smbus(&blk); diff --git a/src/mainboard/intel/kblrvp/romstage.c b/src/mainboard/intel/kblrvp/romstage.c index 9082254385..7bfbe1c744 100644 --- a/src/mainboard/intel/kblrvp/romstage.c +++ b/src/mainboard/intel/kblrvp/romstage.c @@ -51,7 +51,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) mem_cfg->MemorySpdPtr00 = (uintptr_t)rdev_mmap_full(&spd_rdev); } else { /* for CONFIG_BOARD_INTEL_KBLRVP7 */ struct spd_block blk = { - .addr_map = { 0xa0, 0xa2, 0xa4, 0xa6, }, + .addr_map = { 0x50, 0x51, 0x52, 0x53, }, }; mem_cfg->DqPinsInterleaved = 1; diff --git a/src/mainboard/purism/librem13v2/romstage.c b/src/mainboard/purism/librem13v2/romstage.c index bd5520a7c4..c8c3cd9510 100644 --- a/src/mainboard/purism/librem13v2/romstage.c +++ b/src/mainboard/purism/librem13v2/romstage.c @@ -35,7 +35,7 @@ void mainboard_memory_init_params(struct romstage_params *params, MEMORY_INIT_UPD *memory_params) { struct spd_block blk = { - .addr_map = { 0xa0 }, + .addr_map = { 0x50 }, }; memory_params->DqPinsInterleaved = 1; |