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authorZheng Bao <fishbaozi@gmail.com>2013-02-07 17:30:23 +0800
committerPatrick Georgi <patrick@georgi-clan.de>2013-02-11 21:01:47 +0100
commit600784e8b9d11dd1e1afc1918e6eda004ac69de4 (patch)
tree1faa93a7b7319266d274709a1142f875386f3c74
parent8cc846897132f6d6baa49118005815aefb5f560f (diff)
downloadcoreboot-600784e8b9d11dd1e1afc1918e6eda004ac69de4.tar.xz
spi.h: Rename the spi.h to spi-generic.h
Since there are and will be other files in nb/sb folders, we change the general spi.h to a file name which is not easy to be duplicated. Change-Id: I6548a81206caa608369be044747bde31e2b08d1a Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: zbao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/2309 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
-rw-r--r--src/cpu/amd/agesa/s3_resume.c2
-rw-r--r--src/drivers/elog/elog.c2
-rw-r--r--src/drivers/spi/spi_flash.c2
-rw-r--r--src/include/spi-generic.h (renamed from src/include/spi.h)0
-rw-r--r--src/include/spi_flash.h2
-rw-r--r--src/northbridge/intel/sandybridge/mrccache.c2
-rw-r--r--src/southbridge/amd/agesa/hudson/spi.c2
-rw-r--r--src/southbridge/amd/cimx/sb800/SBPLATFORM.h2
-rw-r--r--src/southbridge/amd/cimx/sb800/spi.c2
-rw-r--r--src/southbridge/intel/bd82x6x/finalize.c2
-rw-r--r--src/southbridge/intel/bd82x6x/spi.c2
11 files changed, 10 insertions, 10 deletions
diff --git a/src/cpu/amd/agesa/s3_resume.c b/src/cpu/amd/agesa/s3_resume.c
index 5b4c2c3d42..ee9d7c9f2d 100644
--- a/src/cpu/amd/agesa/s3_resume.c
+++ b/src/cpu/amd/agesa/s3_resume.c
@@ -41,7 +41,7 @@
#include "agesawrapper.h"
#ifndef __PRE_RAM__
-#include <spi.h>
+#include <spi-generic.h>
#include <spi_flash.h>
#endif
diff --git a/src/drivers/elog/elog.c b/src/drivers/elog/elog.c
index e6baace623..1a794d90ab 100644
--- a/src/drivers/elog/elog.c
+++ b/src/drivers/elog/elog.c
@@ -22,7 +22,7 @@
#include <console/console.h>
#include <pc80/mc146818rtc.h>
#include <smbios.h>
-#include <spi.h>
+#include <spi-generic.h>
#include <spi_flash.h>
#include <stdint.h>
#include <string.h>
diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c
index 6b658f894d..d1a95046db 100644
--- a/src/drivers/spi/spi_flash.c
+++ b/src/drivers/spi/spi_flash.c
@@ -9,7 +9,7 @@
#include <stdlib.h>
#include <string.h>
-#include <spi.h>
+#include <spi-generic.h>
#include <spi_flash.h>
#include <delay.h>
#ifdef __SMM__
diff --git a/src/include/spi.h b/src/include/spi-generic.h
index d394531712..d394531712 100644
--- a/src/include/spi.h
+++ b/src/include/spi-generic.h
diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h
index b84bd96fc6..6fd9f130d6 100644
--- a/src/include/spi_flash.h
+++ b/src/include/spi_flash.h
@@ -26,7 +26,7 @@
#include <stdint.h>
#include <stddef.h>
#include <console/console.h>
-#include <spi.h>
+#include <spi-generic.h>
/**
* container_of - cast a member of a structure out to the containing structure
diff --git a/src/northbridge/intel/sandybridge/mrccache.c b/src/northbridge/intel/sandybridge/mrccache.c
index 30d28ad812..ea3b38d3f8 100644
--- a/src/northbridge/intel/sandybridge/mrccache.c
+++ b/src/northbridge/intel/sandybridge/mrccache.c
@@ -26,7 +26,7 @@
#include <cbmem.h>
#include "pei_data.h"
#include "sandybridge.h"
-#include <spi.h>
+#include <spi-generic.h>
#include <spi_flash.h>
#if CONFIG_CHROMEOS
#include <vendorcode/google/chromeos/fmap.h>
diff --git a/src/southbridge/amd/agesa/hudson/spi.c b/src/southbridge/amd/agesa/hudson/spi.c
index aebe4b5cec..dabf8b7a43 100644
--- a/src/southbridge/amd/agesa/hudson/spi.c
+++ b/src/southbridge/amd/agesa/hudson/spi.c
@@ -20,7 +20,7 @@
#include <stdlib.h>
#include <string.h>
#include <arch/io.h>
-#include <spi.h>
+#include <spi-generic.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h
index 1966eb469c..a8c3b61002 100644
--- a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h
+++ b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h
@@ -163,7 +163,7 @@ typedef union _PCI_ADDR {
#include "vendorcode/amd/cimx/sb800/AMDSBLIB.h"
#if CONFIG_HAVE_ACPI_RESUME
-#include "spi.h"
+#include <spi-generic.h>
#endif
#define BIOSRAM_INDEX 0xcd4
diff --git a/src/southbridge/amd/cimx/sb800/spi.c b/src/southbridge/amd/cimx/sb800/spi.c
index 46cc7419ba..d4b80f9627 100644
--- a/src/southbridge/amd/cimx/sb800/spi.c
+++ b/src/southbridge/amd/cimx/sb800/spi.c
@@ -20,7 +20,7 @@
#include <stdlib.h>
#include <string.h>
#include <arch/io.h>
-#include <spi.h>
+#include <spi-generic.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/intel/bd82x6x/finalize.c b/src/southbridge/intel/bd82x6x/finalize.c
index 4a4f021a13..f627972860 100644
--- a/src/southbridge/intel/bd82x6x/finalize.c
+++ b/src/southbridge/intel/bd82x6x/finalize.c
@@ -23,7 +23,7 @@
#include <console/post_codes.h>
#include <northbridge/intel/sandybridge/pcie_config.c>
#include "pch.h"
-#include "spi.h"
+#include <spi-generic.h>
void intel_pch_finalize_smm(void)
{
diff --git a/src/southbridge/intel/bd82x6x/spi.c b/src/southbridge/intel/bd82x6x/spi.c
index 05649fc85d..4303dd0e7a 100644
--- a/src/southbridge/intel/bd82x6x/spi.c
+++ b/src/southbridge/intel/bd82x6x/spi.c
@@ -29,7 +29,7 @@
#include <console/console.h>
#include <device/pci_ids.h>
-#include <spi.h>
+#include <spi-generic.h>
#define min(a, b) ((a)<(b)?(a):(b))