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authorPatrick Georgi <patrick.georgi@secunet.com>2012-07-06 11:31:39 +0200
committerPeter Stuge <peter@stuge.se>2012-07-06 11:53:49 +0200
commit6444bd4547802cc27e8830161341e68b1dcf0ba1 (patch)
treece9570f65fdc02c44df5b0fa954d29d92385d0b2
parent3397ceff7b8a2453e4f045f32f2aaa5be1b2166d (diff)
downloadcoreboot-6444bd4547802cc27e8830161341e68b1dcf0ba1.tar.xz
i945: Reset IGD on boot
This is mostly necessary for reboot, but it doesn't hurt the boot process. On reboot explicitely reset the integrated graphics, otherwise the VGABIOS might not be able to reinitialize it properly, and you either have a still of the last pre-reboot image, garbage or an empty screen, but no text-mode. Change-Id: Ic3d6932fbaf720d88daaac7e4b09c3c0b9f0b0e2 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/1178 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
-rw-r--r--src/northbridge/intel/i945/gma.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c
index 340ddcd3a1..b703a80e71 100644
--- a/src/northbridge/intel/i945/gma.c
+++ b/src/northbridge/intel/i945/gma.c
@@ -18,15 +18,25 @@
*/
#include <console/console.h>
+#include <delay.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <pc80/mc146818rtc.h>
+#define GDRST 0xc0
+
static void gma_func0_init(struct device *dev)
{
u32 reg32;
+ /* Unconditionally reset graphics */
+ pci_write_config8(dev, GDRST, 1);
+ udelay(50);
+ pci_write_config8(dev, GDRST, 0);
+ /* wait for device to finish */
+ while (pci_read_config8(dev, GDRST) & 1) { };
+
/* IGD needs to be Bus Master */
reg32 = pci_read_config32(dev, PCI_COMMAND);
pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER);