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authorHung-Te Lin <hungte@chromium.org>2013-06-05 14:06:55 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-07-10 22:49:18 +0200
commit7dd581494dbaff64e4a2dd31f29cb254104d2d03 (patch)
treedcd615b80927014cf180a2b80324926ea4333be8
parentce7a5a790be1cd734c5d1c9f934ade0433c0b96b (diff)
downloadcoreboot-7dd581494dbaff64e4a2dd31f29cb254104d2d03.tar.xz
snow: Add flush to UART driver.
Wait for UART FIFO to be ready. (Credit to dhendrix for finding the bits to test with.) Change-Id: Ib6733e422cbc1c61b942bd90d85f88a3f412d6ff Signed-off-by: Hung-Te Lin <hungte@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3698 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
-rw-r--r--src/cpu/samsung/exynos5250/uart.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/src/cpu/samsung/exynos5250/uart.c b/src/cpu/samsung/exynos5250/uart.c
index 24812ae64f..41dc709c97 100644
--- a/src/cpu/samsung/exynos5250/uart.c
+++ b/src/cpu/samsung/exynos5250/uart.c
@@ -162,12 +162,19 @@ static void exynos5_uart_tx_byte(unsigned char data)
writeb(data, &uart->utxh);
}
+static void exynos5_uart_tx_flush(void)
+{
+ struct s5p_uart *uart = (struct s5p_uart *)base_port;
+
+ while (readl(&uart->ufstat) & 0x1ff0000);
+}
+
#if !defined(__PRE_RAM__)
static const struct console_driver exynos5_uart_console __console = {
.init = exynos5_init_dev,
.tx_byte = exynos5_uart_tx_byte,
-// .tx_flush = exynos5_uart_tx_flush,
+ .tx_flush = exynos5_uart_tx_flush,
.rx_byte = exynos5_uart_rx_byte,
// .tst_byte = exynos5_uart_tst_byte,
};
@@ -196,6 +203,7 @@ void uart_tx_byte(unsigned char data)
void uart_tx_flush(void)
{
+ exynos5_uart_tx_flush();
}
#endif