diff options
author | Zheng Bao <fishbaozi@gmail.com> | 2012-10-24 11:20:44 +0800 |
---|---|---|
committer | Marc Jones <marcj303@gmail.com> | 2012-10-30 05:16:37 +0100 |
commit | 80adfdf8a9dde4b81fc0d0ffacf04835c4eaa883 (patch) | |
tree | d4ef6108d4395ebda19e0ab5979dac60e3fc20b1 | |
parent | 9ead80f8700b37779ca6536b423fa5ee9544efd2 (diff) | |
download | coreboot-80adfdf8a9dde4b81fc0d0ffacf04835c4eaa883.tar.xz |
AMD SB800: PCIE slots on Persimmon
Enable the PCIE bridge which is connected to the PCIE slot.
Change-Id: I1b3fb59990e06d7bc7cf19639f2b93dbb7bf9b3e
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1098
Tested-by: build bot (Jenkins)
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-by: Marc Jones <marcj303@gmail.com>
-rw-r--r-- | src/mainboard/amd/persimmon/devicetree.cb | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/amd/persimmon/devicetree.cb b/src/mainboard/amd/persimmon/devicetree.cb index e5bbca2b46..da81dc3adf 100644 --- a/src/mainboard/amd/persimmon/devicetree.cb +++ b/src/mainboard/amd/persimmon/devicetree.cb @@ -28,12 +28,12 @@ chip northbridge/amd/agesa/family14/root_complex # device pci 18.0 on # northbridge chip northbridge/amd/agesa/family14 # PCI side of HT root complex device pci 0.0 on end # Root Complex - device pci 1.0 on end # Internal Graphics P2P bridge 0x9804 + device pci 1.0 on end # Internal Graphics P2P bridge 0x980[2456] device pci 1.1 on end # Internal Multimedia - device pci 4.0 on end # PCIE P2P bridge 0x9604 - device pci 5.0 off end # PCIE P2P bridge 0x9605 - device pci 6.0 off end # PCIE P2P bridge 0x9606 - device pci 7.0 off end # PCIE P2P bridge 0x9607 + device pci 4.0 on end # PCIE P2P bridge on-board NIC + device pci 5.0 off end # PCIE P2P bridge + device pci 6.0 on end # PCIE P2P bridge PCIe slot + device pci 7.0 off end # PCIE P2P bridge device pci 8.0 off end # NB/SB Link P2P bridge end # agesa northbridge |