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authorJonathan Neuschäfer <j.neuschaefer@gmx.net>2018-12-11 15:16:29 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-12-19 05:17:39 +0000
commit84eb41d74cc555a95fa98fb07e5faff17ffc510f (patch)
tree05833516fe86f6c5917b7c3f1373d6f96490c7fe
parentafd40b2e2f547baaa367541f7a53d033c0321bf2 (diff)
downloadcoreboot-84eb41d74cc555a95fa98fb07e5faff17ffc510f.tar.xz
Documentation/soc/intel/icelake: Fix indentation in numbered list
Without this patch, the numbers restart at 1 at several points in the HTML output. Change-Id: Ie3634775ed9f993b1181785c58d72834183336e1 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/c/30156 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
-rw-r--r--Documentation/soc/intel/icelake/iceLake_coreboot_development.md24
1 files changed, 12 insertions, 12 deletions
diff --git a/Documentation/soc/intel/icelake/iceLake_coreboot_development.md b/Documentation/soc/intel/icelake/iceLake_coreboot_development.md
index 59b013dc03..6f194cae15 100644
--- a/Documentation/soc/intel/icelake/iceLake_coreboot_development.md
+++ b/Documentation/soc/intel/icelake/iceLake_coreboot_development.md
@@ -33,27 +33,27 @@ Like any other Intel SoC, Ice Lake coreboot development is also based on "Intel
## Create coreboot Image
1. Clone latest coreboot code as below
-```bash
-$ git clone https://review.coreboot.org/coreboot.git
-```
+ ```bash
+ $ git clone https://review.coreboot.org/coreboot.git
+ ```
2. Place blobs (ucode, me.bin and FSP packages) in appropriate locations
-Note:
-Consider the fact that ucode and ME kit for Ice Lake SoC will be available from Intel VIP site.
-After product launch, FSP binary will be available externally as any other program.
+ Note:
+ Consider the fact that ucode and ME kit for Ice Lake SoC will be available from Intel VIP site.
+ After product launch, FSP binary will be available externally as any other program.
3. Create coreboot .config
4. Build toolchain
-```bash
-CPUS=$(nproc--ignore=1) make crossgcc-i386 iasl
-```
+ ```bash
+ CPUS=$(nproc--ignore=1) make crossgcc-i386 iasl
+ ```
5. Build image
-```bash
-$ make # the image is generated as build/coreboot.rom
-```
+ ```bash
+ $ make # the image is generated as build/coreboot.rom
+ ```
## Flashing coreboot