AGESA: Correct PCI function number for MEM_GET(SET)REG outputs

PCI function number takes only 3 bits, therefore
correct bitmask for it is 0x7.

Change-Id: Id41700be0474eecc4d5b5173c4d5686c421735e3
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Reviewed-on: https://review.coreboot.org/20837
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

19 files changed, 38 insertions, 38 deletions

diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c
index b4335d646f..ebf73e052b 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c
@@ -209,7 +209,7 @@ MemNCmnGetSetFieldC32 (
         LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
         if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
             (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);
+          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);
         }
       } else if (Type == DCT_PHY_ACCESS) {
         MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
@@ -240,7 +240,7 @@ MemNCmnGetSetFieldC32 (
           LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
           if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
               (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-            IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);
+            IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
           }
         } else if (Type == DCT_PHY_ACCESS) {
           MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c
index 7d5b684ada..c721618b49 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c
@@ -194,7 +194,7 @@ MemNCmnGetSetFieldDA (
         LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
         if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
             (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);
+          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);
         }
       } else if (Type == DCT_PHY_ACCESS) {
         MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
@@ -220,7 +220,7 @@ MemNCmnGetSetFieldDA (
           LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
           if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
               (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-            IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);
+            IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
           }
         } else if (Type == DCT_PHY_ACCESS) {
           MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c
index b84006b7ef..9b871f2784 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c
@@ -195,7 +195,7 @@ MemNCmnGetSetFieldDr (
         LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
         if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
             (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);
+          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);
         }
       } else if (Type == DCT_PHY_ACCESS) {
         MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
@@ -221,7 +221,7 @@ MemNCmnGetSetFieldDr (
           LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
           if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
               (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-            IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);
+            IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
           }
         } else if (Type == DCT_PHY_ACCESS) {
           MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c
index 8f59d4d79f..61cf26b537 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c
@@ -210,7 +210,7 @@ MemNCmnGetSetFieldHy (
         LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
         if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
             (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);
+          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);
         }
       } else if (Type == DCT_PHY_ACCESS) {
         MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
@@ -241,7 +241,7 @@ MemNCmnGetSetFieldHy (
           LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
           if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
               (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-            IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);
+            IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
           }
         } else if (Type == DCT_PHY_ACCESS) {
           MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c
index ff6e673502..607fce0ec2 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c
@@ -219,7 +219,7 @@ MemNCmnGetSetFieldLN (
           LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
           if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
               (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-            IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);
+            IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);
           }
         } else if (Type == DCT_PHY_ACCESS) {
           if (IsPhyDirectAccess && (NumOfInstances > 1)) {
@@ -251,7 +251,7 @@ MemNCmnGetSetFieldLN (
             LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
             if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
                 (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-              IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);
+              IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
             }
           } else if (Type == DCT_PHY_ACCESS) {
             MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnregc32.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnregc32.c
index c7b6dcf892..715e072ecc 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnregc32.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnregc32.c
@@ -211,7 +211,7 @@ MemNCmnGetSetFieldC32 (
         LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
         if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
             (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);
+          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);
         }
       } else if (Type == DCT_PHY_ACCESS) {
         MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
@@ -242,7 +242,7 @@ MemNCmnGetSetFieldC32 (
           LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
           if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
               (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-            IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);
+            IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
           }
         } else if (Type == DCT_PHY_ACCESS) {
           MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnregda.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnregda.c
index 22dcee3a59..56d38809a7 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnregda.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnregda.c
@@ -196,7 +196,7 @@ MemNCmnGetSetFieldDA (
         LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
         if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
             (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);
+          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);
         }
       } else if (Type == DCT_PHY_ACCESS) {
         MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
@@ -222,7 +222,7 @@ MemNCmnGetSetFieldDA (
           LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
           if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
               (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-            IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);
+            IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
           }
         } else if (Type == DCT_PHY_ACCESS) {
           MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DR/mnregdr.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DR/mnregdr.c
index b549cbae6c..317cfb7416 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DR/mnregdr.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DR/mnregdr.c
@@ -197,7 +197,7 @@ MemNCmnGetSetFieldDr (
         LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
         if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
             (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);
+          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);
         }
       } else if (Type == DCT_PHY_ACCESS) {
         MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
@@ -223,7 +223,7 @@ MemNCmnGetSetFieldDr (
           LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
           if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
               (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-            IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);
+            IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
           }
         } else if (Type == DCT_PHY_ACCESS) {
           MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/HY/mnreghy.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/HY/mnreghy.c
index a8a11706bc..da6d6fa1f0 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/HY/mnreghy.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/HY/mnreghy.c
@@ -212,7 +212,7 @@ MemNCmnGetSetFieldHy (
         LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
         if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
             (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);
+          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);
         }
       } else if (Type == DCT_PHY_ACCESS) {
         MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
@@ -243,7 +243,7 @@ MemNCmnGetSetFieldHy (
           LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
           if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
               (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-            IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);
+            IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
           }
         } else if (Type == DCT_PHY_ACCESS) {
           MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnregon.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnregon.c
index e92dec0023..109cd53661 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnregon.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnregon.c
@@ -242,7 +242,7 @@ MemNCmnGetSetFieldON (
           LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
           if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
               (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-            IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);
+            IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);
           }
         } else if (Type == DCT_PHY_ACCESS) {
           if (IsPhyDirectAccess && (NumOfInstances > 1)) {
@@ -276,7 +276,7 @@ MemNCmnGetSetFieldON (
             LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
             if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
                 (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-              IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);
+              IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
             }
           } else if (Type == DCT_PHY_ACCESS) {
             MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/NB/ON/mrnon.c b/src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/NB/ON/mrnon.c
index 7915b848bf..f9acf5a53e 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/NB/ON/mrnon.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/NB/ON/mrnon.c
@@ -345,7 +345,7 @@ MemRecNCmnGetSetFieldON (
         LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
           if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
               (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-            IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);
+            IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);
           }
       } else if (Type == DCT_PHY_ACCESS) {
           if (IsPhyDirectAccess && (NumOfInstances > 1)) {
@@ -377,7 +377,7 @@ MemRecNCmnGetSetFieldON (
           LibAmdPciWrite (AccessWidth32, PciAddr , &Value, &NBPtr->MemPtr->StdHeader);
             if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
                 (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-              IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);
+              IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
             }
         } else if (Type == DCT_PHY_ACCESS) {
           MemRecNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/C32/mnregc32.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/C32/mnregc32.c
index 17c603ff52..953dd4cf00 100644
--- a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/C32/mnregc32.c
+++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/C32/mnregc32.c
@@ -210,7 +210,7 @@ MemNCmnGetSetFieldC32 (
         LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
         if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
             (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);
+          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);
         }
       } else if (Type == DCT_PHY_ACCESS) {
         MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
@@ -241,7 +241,7 @@ MemNCmnGetSetFieldC32 (
           LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
           if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
               (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-            IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);
+            IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
           }
         } else if (Type == DCT_PHY_ACCESS) {
           MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DA/mnregda.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DA/mnregda.c
index 336fb35eb0..f97a550136 100644
--- a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DA/mnregda.c
+++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DA/mnregda.c
@@ -195,7 +195,7 @@ MemNCmnGetSetFieldDA (
         LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
         if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
             (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);
+          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);
         }
       } else if (Type == DCT_PHY_ACCESS) {
         MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
@@ -221,7 +221,7 @@ MemNCmnGetSetFieldDA (
           LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
           if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
               (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-            IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);
+            IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
           }
         } else if (Type == DCT_PHY_ACCESS) {
           MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DR/mnregdr.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DR/mnregdr.c
index 5c6207d72d..d74b75e529 100644
--- a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DR/mnregdr.c
+++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DR/mnregdr.c
@@ -196,7 +196,7 @@ MemNCmnGetSetFieldDr (
         LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
         if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
             (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);
+          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);
         }
       } else if (Type == DCT_PHY_ACCESS) {
         MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
@@ -222,7 +222,7 @@ MemNCmnGetSetFieldDr (
           LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
           if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
               (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-            IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);
+            IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
           }
         } else if (Type == DCT_PHY_ACCESS) {
           MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/HY/mnreghy.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/HY/mnreghy.c
index 90bb9e46f5..5177cec4bd 100644
--- a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/HY/mnreghy.c
+++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/HY/mnreghy.c
@@ -211,7 +211,7 @@ MemNCmnGetSetFieldHy (
         LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
         if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
             (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);
+          IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);
         }
       } else if (Type == DCT_PHY_ACCESS) {
         MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
@@ -242,7 +242,7 @@ MemNCmnGetSetFieldHy (
           LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
           if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
               (FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
-            IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);
+            IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
           }
         } else if (Type == DCT_PHY_ACCESS) {
           MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/OR/mnregor.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/OR/mnregor.c
index 512ef14475..a29093f072 100644
--- a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/OR/mnregor.c
+++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/OR/mnregor.c
@@ -238,7 +238,7 @@ MemNCmnGetSetFieldOr (
           if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) && (FieldName != BFDctCfgSel)) {
             IDS_HDT_CONSOLE (MEM_GETREG, "~Dev%x Dct%d Fn%d_%03x = %x\n",
                              NBPtr->PciAddr.Address.Device, NBPtr->Dct,
-                             (Address >> 12) & 0xF, Address & 0xFFF, Value);
+                             (Address >> 12) & 0x7, Address & 0xFFF, Value);
           }
         } else if (Type == DCT_PHY_ACCESS) {
           if (IsPhyDirectAccess && (NumOfInstances > 1)) {
@@ -273,7 +273,7 @@ MemNCmnGetSetFieldOr (
             if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) && (FieldName != BFDctCfgSel)) {
               IDS_HDT_CONSOLE (MEM_SETREG, "~Dev%x Dct%d Fn%d_%03x [%d:%d] = %x\n",
                                NBPtr->PciAddr.Address.Device, NBPtr->Dct,
-                               (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);
+                               (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
             }
           } else if (Type == DCT_PHY_ACCESS) {
             MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
diff --git a/src/vendorcode/amd/agesa/f15/Proc/Recovery/Mem/NB/OR/mrnor.c b/src/vendorcode/amd/agesa/f15/Proc/Recovery/Mem/NB/OR/mrnor.c
index 8fcfc96932..eb91bac905 100644
--- a/src/vendorcode/amd/agesa/f15/Proc/Recovery/Mem/NB/OR/mrnor.c
+++ b/src/vendorcode/amd/agesa/f15/Proc/Recovery/Mem/NB/OR/mrnor.c
@@ -548,7 +548,7 @@ MemRecNCmnGetSetFieldOr (
         LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
         IDS_HDT_CONSOLE (MEM_GETREG, "~Dev%x Dct%d Fn%d_%03x = %x\n",
                          NBPtr->PciAddr.Address.Device, NBPtr->Dct,
-                         (Address >> 12) & 0xF, Address & 0xFFF, Value);
+                         (Address >> 12) & 0x7, Address & 0xFFF, Value);
       } else if (Type == DCT_PHY_ACCESS) {
         MemRecNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
         while (MemRecNGetBitFieldNb (NBPtr, BFDctAccessDone) == 0) {}
@@ -573,7 +573,7 @@ MemRecNCmnGetSetFieldOr (
           LibAmdPciWrite (AccessWidth32, PciAddr , &Value, &NBPtr->MemPtr->StdHeader);
           IDS_HDT_CONSOLE (MEM_SETREG, "~Dev%x Dct%d Fn%d_%03x [%d:%d] = %x\n",
                            NBPtr->PciAddr.Address.Device, NBPtr->Dct,
-                           (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);
+                           (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
         } else if (Type == DCT_PHY_ACCESS) {
           MemRecNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
           Address |= DCT_ACCESS_WRITE;
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c
index ca2afb4979..5bf1093c6f 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c
@@ -235,7 +235,7 @@ MemNCmnGetSetFieldTN (
           if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) && (FieldName != BFDctCfgSel)) {
             IDS_HDT_CONSOLE (MEM_GETREG, "~Dev%x Dct%d Fn%d_%03x = %x\n",
                              NBPtr->PciAddr.Address.Device, NBPtr->Dct,
-                             (Address >> 12) & 0xF, Address & 0xFFF, Value);
+                             (Address >> 12) & 0x7, Address & 0xFFF, Value);
           }
         } else if (Type == DCT_PHY_ACCESS) {
           if (IsPhyDirectAccess && (NumOfInstances > 1)) {
@@ -266,7 +266,7 @@ MemNCmnGetSetFieldTN (
               if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) && (FieldName != BFDctCfgSel)) {
                 IDS_HDT_CONSOLE (MEM_SETREG, "~Dev%x Dct%d Fn%d_%03x [%d:%d] = %x\n",
                                  NBPtr->PciAddr.Address.Device, NBPtr->Dct,
-                                 (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);
+                                 (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
               }
             } else if (Type == DCT_PHY_ACCESS) {
               MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c
index df810d0df1..f8b70b877a 100644
--- a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c
@@ -234,7 +234,7 @@ MemNCmnGetSetFieldKB (
           if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) && (FieldName != BFDctCfgSel)) {
             IDS_HDT_CONSOLE (MEM_GETREG, "~Dev%x Dct%d Fn%d_%03x = %x\n",
                              NBPtr->PciAddr.Address.Device, NBPtr->Dct,
-                             (Address >> 12) & 0xF, Address & 0xFFF, Value);
+                             (Address >> 12) & 0x7, Address & 0xFFF, Value);
           }
         } else if (Type == DCT_PHY_ACCESS) {
           if (IsPhyDirectAccess && (NumOfInstances > 1)) {
@@ -265,7 +265,7 @@ MemNCmnGetSetFieldKB (
               if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) && (FieldName != BFDctCfgSel)) {
                 IDS_HDT_CONSOLE (MEM_SETREG, "~Dev%x Dct%d Fn%d_%03x [%d:%d] = %x\n",
                                  NBPtr->PciAddr.Address.Device, NBPtr->Dct,
-                                 (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);
+                                 (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
               }
             } else if (Type == DCT_PHY_ACCESS) {
               ASSERT (!NBPtr->IsSupported[ScrubberEn]);   // Phy CSR write is not allowed after scrubber is enabled