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authorJulius Werner <jwerner@chromium.org>2019-06-06 17:35:25 -0700
committerJulius Werner <jwerner@chromium.org>2019-06-10 18:01:03 +0000
commit8dcf24fcbf5746693ae0227e9cdfb486efb4907e (patch)
treecea69a3cc1186b7de5fcab66dfcb54025636049b
parent092fa8bba8c1f6ae0be2afd27b9a113e01b244c8 (diff)
downloadcoreboot-8dcf24fcbf5746693ae0227e9cdfb486efb4907e.tar.xz
cbfs_spi: Enable speed logging by default for BIOS_DEBUG
The SPI transfer speed logging in cbfs_spi is super useful, doesn't get in the way (just adding one line per stage, essentially) and should have no notable overhead. Let's enable it by default for the BIOS_DEBUG log level rather than having to recompile to get it. Also fix an issue with building this code on MIPS due to lack of 64-bit division primitives. (This means MIPS and arm32 board may display incorrect results when reading more than 4MB in a single transfer, which sounds very unlikely.) Change-Id: I03c77938afe01fdcecf917e8c4c25cc29cdc764e Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33281 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
-rw-r--r--src/drivers/spi/cbfs_spi.c11
1 files changed, 4 insertions, 7 deletions
diff --git a/src/drivers/spi/cbfs_spi.c b/src/drivers/spi/cbfs_spi.c
index e311752dee..ad282c695b 100644
--- a/src/drivers/spi/cbfs_spi.c
+++ b/src/drivers/spi/cbfs_spi.c
@@ -31,21 +31,18 @@ static struct spi_flash spi_flash_info;
static bool spi_flash_init_done;
/*
- * Set this to 1 to debug SPI speed, 0 to disable it
- * The format is:
+ * SPI speed logging for big transfers available with BIOS_DEBUG. The format is:
*
- * read SPI 62854 7db7: 10416 us, 3089 KB/s, 24.712 Mbps
+ * read SPI 0x62854 0x7db7: 10416 us, 3089 KB/s, 24.712 Mbps
*
* The important number is the last one. It should roughly match your SPI
* clock. If it doesn't, your driver might need a little tuning.
*/
-#define SPI_SPEED_DEBUG 0
-
static ssize_t spi_readat(const struct region_device *rd, void *b,
size_t offset, size_t size)
{
struct stopwatch sw;
- bool show = SPI_SPEED_DEBUG && size >= 4 * KiB;
+ bool show = size >= 4 * KiB && console_log_level(BIOS_DEBUG);
if (show)
stopwatch_init(&sw);
@@ -58,7 +55,7 @@ static ssize_t spi_readat(const struct region_device *rd, void *b,
u64 speed; /* KiB/s */
int bps; /* Bits per second */
- speed = (u64)size * 1000 / usecs;
+ speed = size * 1000 / usecs;
bps = speed * 8;
printk(BIOS_DEBUG, "read SPI %#zx %#zx: %ld us, %lld KB/s, %d.%03d Mbps\n",