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authorCaesar Wang <wxt@rock-chips.com>2016-04-28 14:37:48 +0800
committerPatrick Georgi <pgeorgi@google.com>2016-05-09 08:51:34 +0200
commit905a933f46730c51b84ab4df5241d3ab492d4e69 (patch)
tree1f6e8b1b0fb4877e902ebf52c7022ab73c76e473
parentfb5332900b4e44a2368446f023a68b598515f319 (diff)
downloadcoreboot-905a933f46730c51b84ab4df5241d3ab492d4e69.tar.xz
rockchip/rk3399: protect the DRAM address for atf
We need ensure the bl31 base is greater than 4KB since there's the shared mem for coreboot. BRANCH=none BUG=chrome-os-partner:51537 TEST=boot to kernel with atf patch Change-Id: I44cf436b3072f03b93da4a19227dcc540d7513db Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: a462f604c284c84bd8c5a0420e75eeae5035b382 Original-Change-Id: I55ec134762bb6bcbc91937ad5763617d7488490b Original-Signed-off-by: Caesar Wang <wxt@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/342334 Original-Commit-Ready: Vadim Bendebury <vbendeb@google.com> Original-Tested-by: Shunqian Zheng <zhengsq@rock-chips.com> Original-Reviewed-by: Vadim Bendebury <vbendeb@google.com> Reviewed-on: https://review.coreboot.org/14741 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
-rw-r--r--src/soc/rockchip/rk3399/soc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/rockchip/rk3399/soc.c b/src/soc/rockchip/rk3399/soc.c
index 453dc0f595..5b6ddb2b68 100644
--- a/src/soc/rockchip/rk3399/soc.c
+++ b/src/soc/rockchip/rk3399/soc.c
@@ -33,7 +33,7 @@ static void soc_init(device_t dev)
/* reserve bl31 image, which define in
* arm-trusted-firmware/plat/rockchip/rk3399/include/platform_def.h
*/
- mmio_resource(dev, 1, (0x500000 / KiB), (0x80000 / KiB));
+ mmio_resource(dev, 1, (0x10000 / KiB), (0x80000 / KiB));
}
static struct device_operations soc_ops = {