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| author | Tobias Diedrich <ranma+coreboot@tdiedrich.de> | 2014-11-09 20:16:04 +0100 |
|---|---|---|
| committer | Rudolf Marek <r.marek@assembler.cz> | 2014-11-11 16:30:52 +0100 |
| commit | 93e816171a90801d5b081955d56c22f7328493f3 (patch) | |
| tree | b609d011cefbc5b4b6c1992c9e2d78af3239bdbe | |
| parent | 1aa3e2d9ea5824574db10b758b2411c7baac6919 (diff) | |
| download | coreboot-93e816171a90801d5b081955d56c22f7328493f3.tar.xz | |
asus/f2a85-m: Disable SD controller
The hudson handling alluded to in the original comment was implemented in
commit ea90963666af1ba49d524c46c9d3257f9438e6c4, use it to disable the
SD controller so it doesn't show up in lspci.
Change-Id: Ib2ba79a11af06c6765dcad4070232a8a7c6d2751
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Reviewed-on: http://review.coreboot.org/7383
Tested-by: build bot (Jenkins)
Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
| -rw-r--r-- | src/mainboard/asus/f2a85-m/devicetree.cb | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/asus/f2a85-m/devicetree.cb b/src/mainboard/asus/f2a85-m/devicetree.cb index ade5d89cec..03967921d2 100644 --- a/src/mainboard/asus/f2a85-m/devicetree.cb +++ b/src/mainboard/asus/f2a85-m/devicetree.cb @@ -110,8 +110,7 @@ chip northbridge/amd/agesa/family15tn/root_complex device pci 14.4 on end # PCI 0x4384 device pci 14.5 on end # USB 2 device pci 14.6 off end # Gec - # SD, make it on so the BAR is assigned (if proper hudson on/off handling is implemented this may go away) - device pci 14.7 on end + device pci 14.7 off end # SD device pci 15.0 on end # PCIe 0 - onboard PCIe 1x device pci 15.1 on end # PCIe 1 onboard gigabit device pci 15.2 off end # unused |