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author | Stefan Reinauer <stepan@coresystems.de> | 2008-08-01 11:40:16 +0000 |
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committer | Stefan Reinauer <stepan@openbios.org> | 2008-08-01 11:40:16 +0000 |
commit | 951c62f07455724913171451b5689e40cb565199 (patch) | |
tree | b3e742f04d734ce2fef7080e978d4e296db7881a | |
parent | a91e0fe4410c0cac54ce14f6ebd5371829ed0500 (diff) | |
download | coreboot-951c62f07455724913171451b5689e40cb565199.tar.xz |
add some SPD values from specs. (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3449 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r-- | src/include/spd.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/include/spd.h b/src/include/spd.h index b950f36f51..e04ad7ae1e 100644 --- a/src/include/spd.h +++ b/src/include/spd.h @@ -73,6 +73,7 @@ #define SPD_CMD_SIGNAL_INPUT_HOLD_TIME 33 /* Command and address signal input hold time */ #define SPD_DATA_SIGNAL_INPUT_SETUP_TIME 34 /* Data signal input setup time */ #define SPD_DATA_SIGNAL_INPUT_HOLD_TIME 35 /* Data signal input hold time */ +#define SPD_WRITE_RECOVERY_TIME 36 /* Write recovery time (tWR) */ #define SPD_SPD_DATA_REVISION_CODE 62 /* SPD data revision code */ #define SPD_CHECKSUM_FOR_BYTES_0_TO_62 63 /* Checksum for bytes 0-62 */ #define SPD_MANUFACTURER_JEDEC_ID_CODE 64 /* Manufacturer's JEDEC ID code, per EIA/JEP106 (bytes 64-71) */ @@ -129,6 +130,11 @@ #define SPD_CAS_LATENCY_3_5 0x20 #define SPD_CAS_LATENCY_4_0 0x40 +#define SPD_CAS_LATENCY_DDR2_3 (1 << 3) +#define SPD_CAS_LATENCY_DDR2_4 (1 << 4) +#define SPD_CAS_LATENCY_DDR2_5 (1 << 5) +#define SPD_CAS_LATENCY_DDR2_6 (1 << 6) + /* SPD_SUPPORTED_BURST_LENGTHS values. */ #define SPD_BURST_LENGTH_1 1 #define SPD_BURST_LENGTH_2 2 |