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authorStefan Reinauer <stepan@openbios.org>2006-08-04 07:50:59 +0000
committerStefan Reinauer <stepan@openbios.org>2006-08-04 07:50:59 +0000
commita14b46895c563d7b8eb9363397f10ba3f5d656ee (patch)
tree6a01c9ee3ac078ce6458852c2cdea51e2f7354bb
parentc76b85d6a7414854b61a658758b3147a397e3947 (diff)
downloadcoreboot-a14b46895c563d7b8eb9363397f10ba3f5d656ee.tar.xz
final rename orgy. sorry for the inconvenience. This should fix it again
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2363 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/mainboard/bitworks/ims/auto.c2
-rw-r--r--src/southbridge/intel/i82371eb/chip.h10
-rw-r--r--src/southbridge/intel/i82371eb/i82371eb_early_smbus.c (renamed from src/southbridge/intel/i82371eb/i8371eb_early_smbus.c)2
-rw-r--r--src/southbridge/intel/i82371eb/i82371eb_smbus.c (renamed from src/southbridge/intel/i82371eb/i8371eb_smbus.c)4
-rw-r--r--src/southbridge/intel/i82371eb/i82371eb_smbus.h (renamed from src/southbridge/intel/i82371eb/i8371eb_smbus.h)0
5 files changed, 9 insertions, 9 deletions
diff --git a/src/mainboard/bitworks/ims/auto.c b/src/mainboard/bitworks/ims/auto.c
index cbd1f854bc..89d3fa24ec 100644
--- a/src/mainboard/bitworks/ims/auto.c
+++ b/src/mainboard/bitworks/ims/auto.c
@@ -9,7 +9,7 @@
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
-#include "southbridge/intel/i8371eb/i8371eb_early_smbus.c"
+#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "superio/NSC/pc87351/pc87351_early_serial.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "cpu/x86/mtrr/earlymtrr.c"
diff --git a/src/southbridge/intel/i82371eb/chip.h b/src/southbridge/intel/i82371eb/chip.h
index 9516f3c73b..58efa3b66f 100644
--- a/src/southbridge/intel/i82371eb/chip.h
+++ b/src/southbridge/intel/i82371eb/chip.h
@@ -1,13 +1,13 @@
-#ifndef I8371EB_CHIP_H
-#define I8371EB_CHIP_H
+#ifndef I82371EB_CHIP_H
+#define I82371EB_CHIP_H
-struct southbridge_intel_i8371eb_config
+struct southbridge_intel_i82371eb_config
{
unsigned int ide0_enable : 1;
unsigned int ide1_enable : 1;
};
struct chip_operations;
-extern struct chip_operations southbridge_intel_i8371eb_ops;
+extern struct chip_operations southbridge_intel_i82371eb_ops;
-#endif /* I8371EB_CHIP_H */
+#endif /* I82371EB_CHIP_H */
diff --git a/src/southbridge/intel/i82371eb/i8371eb_early_smbus.c b/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c
index 4b12048016..49be6a49b5 100644
--- a/src/southbridge/intel/i82371eb/i8371eb_early_smbus.c
+++ b/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c
@@ -1,4 +1,4 @@
-#include "i8371eb_smbus.h"
+#include "i82371eb_smbus.h"
#define SMBUS_IO_BASE 0x0f00
diff --git a/src/southbridge/intel/i82371eb/i8371eb_smbus.c b/src/southbridge/intel/i82371eb/i82371eb_smbus.c
index 7a09cce555..6d640b6d56 100644
--- a/src/southbridge/intel/i82371eb/i8371eb_smbus.c
+++ b/src/southbridge/intel/i82371eb/i82371eb_smbus.c
@@ -10,7 +10,7 @@
#include <device/pci_ops.h>
#include <device/smbus.h>
#include <arch/io.h>
-#include "i8371eb.h"
+#include "i82371eb.h"
static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
@@ -31,7 +31,7 @@ static struct device_operations smbus_ops = {
.enable_resources = pci_dev_enable_resources,
.init = 0,
.scan_bus = scan_static_bus,
- .enable = i8371eb_enable,
+ .enable = i82371eb_enable,
.ops_pci = &lops_pci,
.ops_smbus_bus = &lops_smbus_bus,
};
diff --git a/src/southbridge/intel/i82371eb/i8371eb_smbus.h b/src/southbridge/intel/i82371eb/i82371eb_smbus.h
index e1893c5cb1..e1893c5cb1 100644
--- a/src/southbridge/intel/i82371eb/i8371eb_smbus.h
+++ b/src/southbridge/intel/i82371eb/i82371eb_smbus.h