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authorFurquan Shaikh <furquan@google.com>2019-05-29 15:48:10 -0700
committerFurquan Shaikh <furquan@google.com>2019-05-30 23:54:01 +0000
commita1d0928b0014def7481bd5ed4ede739a3aac42ba (patch)
treeaf67cadd6d60010e55735c161dc92eb8f28472bc
parent695da71e615e9c946df64b79795a8d73228fb629 (diff)
downloadcoreboot-a1d0928b0014def7481bd5ed4ede739a3aac42ba.tar.xz
soc/intel/common/block/gpio: Fix the mask for gpio_pm_configure
gpio_pm_configure clears out all the bits related to PM configuration in MISCCFG register and sets only the bits requested by mainboard. The mask as it is set currently results in preserving all PM bits instead of clearing them. This change updates the mask to ensure that the PM bits are cleared before setting the ones requested by mainboard. Change-Id: I5b8c04952775dc1e94fa229328be2f3c1102a468 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33099 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
-rw-r--r--src/soc/intel/common/block/gpio/gpio.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c
index d37601ce3b..7ebf05a220 100644
--- a/src/soc/intel/common/block/gpio/gpio.c
+++ b/src/soc/intel/common/block/gpio/gpio.c
@@ -615,7 +615,7 @@ void gpio_pm_configure(const uint8_t *misccfg_pm_values, size_t num)
{
int i;
size_t gpio_communities;
- uint8_t misccfg_pm_mask = MISCCFG_ENABLE_GPIO_PM_CONFIG;
+ const uint8_t misccfg_pm_mask = ~MISCCFG_ENABLE_GPIO_PM_CONFIG;
const struct pad_community *comm;
comm = soc_gpio_get_community(&gpio_communities);