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| author | Naresh G Solanki <Naresh.Solanki@intel.com> | 2016-01-14 12:22:35 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-01-22 13:02:02 +0100 |
| commit | a69d2f426834418c34cf6baa3f74a9bbc01f4b94 (patch) | |
| tree | 5d7a131bfc032d7080449150237e2c09f2ad3b09 | |
| parent | f28929d393fdd6992be586829befc130f798873b (diff) | |
| download | coreboot-a69d2f426834418c34cf6baa3f74a9bbc01f4b94.tar.xz | |
intel/skylake: Fix klockwork violation
File: src/soc/intel/skylake/flash_controller.c
Line: 192
Variable 'ret' might be used uninitialized in this function.
Hence initializing it with initial value of zero.
BRANCH=None
BUG=chrome-os-partner:48542
TEST=Built & booted Kunimitsu board.
Change-Id: I4e63612890057a2180f38b2e74419d98b02b70c1
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b93ca876912d2336dae25b9b84e56ffb171b215b
Original-Change-Id: Ied8c909f5294d56daddb2806111d477246f98957
Original-Reviewed-on: https://chromium-review.googlesource.com/322082
Original-Commit-Ready: Naresh Solanki <naresh.solanki@intel.com>
Original-Tested-by: Naresh Solanki <naresh.solanki@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/13072
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
| -rw-r--r-- | src/soc/intel/skylake/flash_controller.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/flash_controller.c b/src/soc/intel/skylake/flash_controller.c index 25562a5e9a..0af0484082 100644 --- a/src/soc/intel/skylake/flash_controller.c +++ b/src/soc/intel/skylake/flash_controller.c @@ -182,7 +182,7 @@ void spi_release_bus(struct spi_slave *slave) int pch_hwseq_erase(struct spi_flash *flash, u32 offset, size_t len) { u32 start, end, erase_size; - int ret; + int ret = 0; erase_size = flash->sector_size; if (offset % erase_size || len % erase_size) { |