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authorMaxim Polyakov <max.senia.poliak@gmail.com>2020-04-10 19:36:42 +0300
committerAndrey Petrov <andrey.petrov@gmail.com>2020-04-17 18:18:17 +0000
commitb2634c1f988668bea665c5fa401d820f86d5dd6b (patch)
tree699f0f8332fc11c5862cd7b67d196ac7dc90b1a1
parentafa71b611312dc897b03e2b4bba44e8a427ac8ea (diff)
downloadcoreboot-b2634c1f988668bea665c5fa401d820f86d5dd6b.tar.xz
intel/common: add a macro to set ownership for GPI
Adds a new macro that allow to set the DRIVER or ACPI as host software ownership for the GPI pad using the parameter own. Thus, this macro can define more variants for pad configuration than others. This is necessary to describe in more detail the configuration for the Tioga Pass OCP server [1] and other boards. In addition, these changes will be used to automatically generate macros [2] and great simplify this task. [1] https://review.coreboot.org/c/coreboot/+/39427 [2] https://review.coreboot.org/c/coreboot/+/35643 Change-Id: I9c191fb6935e94da6e296f8fee0b91a973534e1a Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40276 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
-rw-r--r--src/soc/intel/common/block/gpio/gpio.c2
-rw-r--r--src/soc/intel/common/block/include/intelblocks/gpio_defs.h27
2 files changed, 18 insertions, 11 deletions
diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c
index dedd36492c..e73c7767c1 100644
--- a/src/soc/intel/common/block/gpio/gpio.c
+++ b/src/soc/intel/common/block/gpio/gpio.c
@@ -156,7 +156,7 @@ static void gpio_configure_owner(const struct pad_config *cfg,
* needs GPIO driver ownership. Set the bit if GPIO driver ownership
* requested, otherwise clear the bit.
*/
- if (cfg->pad_config[1] & PAD_CFG1_GPIO_DRIVER)
+ if (cfg->pad_config[1] & PAD_CFG_OWN_GPIO_DRIVER)
hostsw_own |= gpio_bitmask_within_group(comm, pin);
else
hostsw_own &= ~gpio_bitmask_within_group(comm, pin);
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h
index bd26e82e30..6eaaf0cab7 100644
--- a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h
+++ b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h
@@ -56,11 +56,15 @@
#define PAD_CFG0_LOGICAL_RESET_PLTRST (2U << 30)
#define PAD_CFG0_LOGICAL_RESET_RSMRST (3U << 30)
-/* Use the fourth bit in IntSel field to indicate gpio
+/*
+ * Use the fourth bit in IntSel field to indicate gpio
* ownership. This field is RO and hence not used during
* gpio configuration.
*/
-#define PAD_CFG1_GPIO_DRIVER (0x1 << 4)
+#define PAD_CFG_OWN_GPIO_DRIVER (1 << 4)
+#define PAD_CFG_OWN_GPIO_ACPI (0 << 4)
+#define PAD_CFG_OWN_GPIO(own) PAD_CFG_OWN_GPIO_##own
+
#define PAD_CFG1_IRQ_MASK (0xff << 0)
#define PAD_CFG1_IOSTERM_MASK (0x3 << 8)
#define PAD_CFG1_IOSTERM_SAME (0x0 << 8)
@@ -249,7 +253,7 @@
_PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | \
PAD_CFG0_TRIG_OFF | PAD_BUF(RX_DISABLE) | !!val, \
- PAD_PULL(pull) | PAD_IOSSTATE(TxLASTRxE) | PAD_CFG1_GPIO_DRIVER)
+ PAD_PULL(pull) | PAD_IOSSTATE(TxLASTRxE) | PAD_CFG_OWN_GPIO(DRIVER))
/* General purpose output. */
#define PAD_CFG_GPO_IOSSTATE_IOSTERM(pad, val, rst, pull, iosstate, ioterm) \
@@ -274,18 +278,24 @@
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_TX_DISABLE, \
PAD_PULL(pull) | PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
-/* General purpose input. The following macro sets the
+/*
+ * General purpose input. The following macro sets the
* Host Software Pad Ownership to GPIO Driver mode.
*/
+#define PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, own) \
+ _PAD_CFG_STRUCT(pad, PAD_FUNC(GPIO) | PAD_RESET(rst) | \
+ PAD_CFG0_TRIG_##trig | PAD_CFG0_RX_POL_NONE | PAD_BUF(TX_DISABLE), \
+ PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE) | PAD_CFG_OWN_GPIO(own))
+
#define PAD_CFG_GPI_GPIO_DRIVER(pad, pull, rst) \
_PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE), \
- PAD_PULL(pull) | PAD_CFG1_GPIO_DRIVER | PAD_IOSSTATE(TxDRxE))
+ PAD_PULL(pull) | PAD_CFG_OWN_GPIO(DRIVER) | PAD_IOSSTATE(TxDRxE))
#define PAD_CFG_GPIO_DRIVER_HI_Z(pad, pull, rst, iosstate, iosterm) \
_PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_RX_DISABLE), \
- PAD_PULL(pull) | PAD_CFG1_GPIO_DRIVER | \
+ PAD_PULL(pull) | PAD_CFG_OWN_GPIO(DRIVER) | \
PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
#define PAD_CFG_GPIO_HI_Z(pad, pull, rst, iosstate, iosterm) \
@@ -295,10 +305,7 @@
/* GPIO Interrupt */
#define PAD_CFG_GPI_INT(pad, pull, rst, trig) \
- _PAD_CFG_STRUCT(pad, \
- PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
- PAD_CFG0_TRIG_##trig | PAD_CFG0_RX_POL_NONE, \
- PAD_PULL(pull) | PAD_CFG1_GPIO_DRIVER | PAD_IOSSTATE(TxDRxE))
+ PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, DRIVER)
/*
* No Connect configuration for unused pad.