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authorAaron Durbin <adurbin@chromium.org>2013-06-13 17:29:36 -0700
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2013-12-01 23:27:10 +0100
commitc7633f4f5e3693c005791006e6cc788b218770c7 (patch)
treea03a6c4092bbfada0a0c1fbaafb7a3a516a1292e
parent752b1e6d5d341e9c328d596a6f00bd8071274a48 (diff)
downloadcoreboot-c7633f4f5e3693c005791006e6cc788b218770c7.tar.xz
slippy/falco/peppy: Fix SPD GPIO initialization.
SPD GPIOs were being read prior to initialization in romstage_common. To fix, pass the copy_spd function to romstage_common, to be called at the appropriate time (after PCH init, before DRAM init). Change-Id: I2554813e56a58c8c81456f1a53cc8ce9c2030a73 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/58608 Reviewed-on: http://review.coreboot.org/4237 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
-rw-r--r--src/cpu/intel/haswell/haswell.h1
-rw-r--r--src/cpu/intel/haswell/romstage.c3
-rw-r--r--src/mainboard/google/falco/romstage.c4
-rw-r--r--src/mainboard/google/peppy/romstage.c4
-rw-r--r--src/mainboard/google/slippy/romstage.c4
-rw-r--r--src/mainboard/intel/baskingridge/romstage.c2
-rw-r--r--src/mainboard/intel/wtm2/romstage.c2
7 files changed, 11 insertions, 9 deletions
diff --git a/src/cpu/intel/haswell/haswell.h b/src/cpu/intel/haswell/haswell.h
index 7dfba863d4..cd007c1f7e 100644
--- a/src/cpu/intel/haswell/haswell.h
+++ b/src/cpu/intel/haswell/haswell.h
@@ -151,6 +151,7 @@ struct romstage_params {
const void *gpio_map;
const struct rcba_config_instruction *rcba_config;
unsigned long bist;
+ void (*copy_spd)(struct pei_data *);
};
void mainboard_romstage_entry(unsigned long bist);
void romstage_common(const struct romstage_params *params);
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index 757cc34eeb..35b51c5b59 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -246,6 +246,9 @@ void romstage_common(const struct romstage_params *params)
report_platform_info();
+ if (params->copy_spd != NULL)
+ params->copy_spd(params->pei_data);
+
sdram_initialize(params->pei_data);
timestamp_add_now(TS_AFTER_INITRAM);
diff --git a/src/mainboard/google/falco/romstage.c b/src/mainboard/google/falco/romstage.c
index ef6a849391..74ace9b75a 100644
--- a/src/mainboard/google/falco/romstage.c
+++ b/src/mainboard/google/falco/romstage.c
@@ -155,11 +155,9 @@ void mainboard_romstage_entry(unsigned long bist)
.gpio_map = &mainboard_gpio_map,
.rcba_config = &rcba_config[0],
.bist = bist,
+ .copy_spd = copy_spd,
};
- /* Prepare SPD data */
- copy_spd(&pei_data);
-
/* Call into the real romstage main with this board's attributes. */
romstage_common(&romstage_params);
}
diff --git a/src/mainboard/google/peppy/romstage.c b/src/mainboard/google/peppy/romstage.c
index 8679adb202..d979203572 100644
--- a/src/mainboard/google/peppy/romstage.c
+++ b/src/mainboard/google/peppy/romstage.c
@@ -183,11 +183,9 @@ void mainboard_romstage_entry(unsigned long bist)
.gpio_map = &mainboard_gpio_map,
.rcba_config = &rcba_config[0],
.bist = bist,
+ .copy_spd = copy_spd,
};
- /* Prepare SPD data */
- copy_spd(&pei_data);
-
/* Call into the real romstage main with this board's attributes. */
romstage_common(&romstage_params);
diff --git a/src/mainboard/google/slippy/romstage.c b/src/mainboard/google/slippy/romstage.c
index 8679adb202..d979203572 100644
--- a/src/mainboard/google/slippy/romstage.c
+++ b/src/mainboard/google/slippy/romstage.c
@@ -183,11 +183,9 @@ void mainboard_romstage_entry(unsigned long bist)
.gpio_map = &mainboard_gpio_map,
.rcba_config = &rcba_config[0],
.bist = bist,
+ .copy_spd = copy_spd,
};
- /* Prepare SPD data */
- copy_spd(&pei_data);
-
/* Call into the real romstage main with this board's attributes. */
romstage_common(&romstage_params);
diff --git a/src/mainboard/intel/baskingridge/romstage.c b/src/mainboard/intel/baskingridge/romstage.c
index 8b18e6d534..1dc49603a9 100644
--- a/src/mainboard/intel/baskingridge/romstage.c
+++ b/src/mainboard/intel/baskingridge/romstage.c
@@ -19,6 +19,7 @@
*/
#include <stdint.h>
+#include <stddef.h>
#include <console/console.h>
#include "cpu/intel/haswell/haswell.h"
#include "northbridge/intel/haswell/haswell.h"
@@ -126,6 +127,7 @@ void mainboard_romstage_entry(unsigned long bist)
.gpio_map = &mainboard_gpio_map,
.rcba_config = &rcba_config[0],
.bist = bist,
+ .copy_spd = NULL,
};
/* Call into the real romstage main with this board's attributes. */
diff --git a/src/mainboard/intel/wtm2/romstage.c b/src/mainboard/intel/wtm2/romstage.c
index f38389c543..0a24e48ba4 100644
--- a/src/mainboard/intel/wtm2/romstage.c
+++ b/src/mainboard/intel/wtm2/romstage.c
@@ -19,6 +19,7 @@
*/
#include <stdint.h>
+#include <stddef.h>
#include <console/console.h>
#include "cpu/intel/haswell/haswell.h"
#include "northbridge/intel/haswell/haswell.h"
@@ -123,6 +124,7 @@ void mainboard_romstage_entry(unsigned long bist)
.gpio_map = &mainboard_gpio_map,
.rcba_config = &rcba_config[0],
.bist = bist,
+ .copy_spd = NULL,
};
/* Call into the real romstage main with this board's attributes. */