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authorNico Huber <nico.huber@secunet.com>2018-05-04 16:29:13 +0200
committerMartin Roth <martinroth@google.com>2018-05-08 03:01:35 +0000
commitd4ac11f6fa9581bc6a9007202c4594be636e0a47 (patch)
treed28506f121aa139f6faf1357fb5cedf2a5bee4df
parent3de303179ac8db5104a77c0f36e3640623057052 (diff)
downloadcoreboot-d4ac11f6fa9581bc6a9007202c4594be636e0a47.tar.xz
Move `pci_ops_mmconf` from arch/x86/ to device/
MMConf is not architecture specific. We also always provide a pci_bus_default_ops() now if MMCONF_SUPPORT is selected. Change-Id: I3f9b403da29d3fa81914cc1519710ba7d1bf2bb5 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/26062 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/arch/x86/Makefile.inc3
-rw-r--r--src/arch/x86/include/arch/pci_ops.h1
-rw-r--r--src/arch/x86/pci_ops.c5
-rw-r--r--src/device/Makefile.inc1
-rw-r--r--src/device/pci_ops_mmconf.c (renamed from src/arch/x86/pci_ops_mmconf.c)7
5 files changed, 9 insertions, 8 deletions
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index df054f8748..f94e5478be 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -346,8 +346,7 @@ ramstage-y += memset.c
ramstage-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
ramstage-$(CONFIG_GENERATE_MP_TABLE) += mpspec.c
ramstage-y += pci_ops_conf1.c
-ramstage-y += pci_ops.c
-ramstage-$(CONFIG_MMCONF_SUPPORT) += pci_ops_mmconf.c
+ramstage-$(CONFIG_NO_MMCONF_SUPPORT) += pci_ops.c
ramstage-$(CONFIG_GENERATE_PIRQ_TABLE) += pirq_routing.c
ramstage-y += rdrand.c
ramstage-$(CONFIG_GENERATE_SMBIOS_TABLES) += smbios.c
diff --git a/src/arch/x86/include/arch/pci_ops.h b/src/arch/x86/include/arch/pci_ops.h
index 678edbb63c..3f1515e8f0 100644
--- a/src/arch/x86/include/arch/pci_ops.h
+++ b/src/arch/x86/include/arch/pci_ops.h
@@ -17,7 +17,6 @@
#ifndef __SIMPLE_DEVICE__
extern const struct pci_bus_operations pci_cf8_conf1;
-extern const struct pci_bus_operations pci_ops_mmconf;
#endif
diff --git a/src/arch/x86/pci_ops.c b/src/arch/x86/pci_ops.c
index 4fd916c865..82f9fd2644 100644
--- a/src/arch/x86/pci_ops.c
+++ b/src/arch/x86/pci_ops.c
@@ -18,8 +18,5 @@
const struct pci_bus_operations *pci_bus_default_ops(struct device *dev)
{
- if (IS_ENABLED(CONFIG_NO_MMCONF_SUPPORT))
- return &pci_cf8_conf1;
-
- return &pci_ops_mmconf;
+ return &pci_cf8_conf1;
}
diff --git a/src/device/Makefile.inc b/src/device/Makefile.inc
index af5e7a9401..82d4b36f1f 100644
--- a/src/device/Makefile.inc
+++ b/src/device/Makefile.inc
@@ -12,6 +12,7 @@ ramstage-$(CONFIG_AZALIA_PLUGIN_SUPPORT) += azalia_device.c
ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += pnp_device.c
ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_64) += pnp_device.c
ramstage-$(CONFIG_PCI) += pci_ops.c
+ramstage-$(CONFIG_MMCONF_SUPPORT) += pci_ops_mmconf.c
ramstage-$(CONFIG_PCI) += pci_early.c
ramstage-$(CONFIG_PCI) += pci_rom.c
ramstage-y += smbus_ops.c
diff --git a/src/arch/x86/pci_ops_mmconf.c b/src/device/pci_ops_mmconf.c
index cf08e17be4..fb085a6852 100644
--- a/src/arch/x86/pci_ops_mmconf.c
+++ b/src/device/pci_ops_mmconf.c
@@ -63,7 +63,7 @@ static void pci_mmconf_write_config32(struct bus *pbus, int bus, int devfn,
write32(PCI_MMIO_ADDR(bus, devfn, where, 3), value);
}
-const struct pci_bus_operations pci_ops_mmconf = {
+static const struct pci_bus_operations pci_ops_mmconf = {
.read8 = pci_mmconf_read_config8,
.read16 = pci_mmconf_read_config16,
.read32 = pci_mmconf_read_config32,
@@ -71,3 +71,8 @@ const struct pci_bus_operations pci_ops_mmconf = {
.write16 = pci_mmconf_write_config16,
.write32 = pci_mmconf_write_config32,
};
+
+const struct pci_bus_operations *pci_bus_default_ops(struct device *dev)
+{
+ return &pci_ops_mmconf;
+}