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authorKeith Hui <buurin@gmail.com>2020-01-12 18:38:28 -0500
committerKyösti Mälkki <kyosti.malkki@gmail.com>2020-01-26 08:15:12 +0000
commitd6f259e834e67119d913dac86f24a842643847b3 (patch)
tree8bc36e3150b2d0272d7be23274affa86ca7a6f0b
parent4444ea54e68e8992a035f3f7c73222292a76878e (diff)
downloadcoreboot-d6f259e834e67119d913dac86f24a842643847b3.tar.xz
intel/i440bx: Add timestamp to RAM init
Change-Id: I27b2fcf6fea18e03dddb015eb017acc5db1db540 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38382 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r--src/northbridge/intel/i440bx/raminit.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c
index 597ba946b4..d5c23cf165 100644
--- a/src/northbridge/intel/i440bx/raminit.c
+++ b/src/northbridge/intel/i440bx/raminit.c
@@ -22,6 +22,7 @@
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <console/console.h>
+#include <timestamp.h>
#include "i440bx.h"
#include "raminit.h"
@@ -1043,6 +1044,7 @@ void __weak disable_spd(void) { }
void sdram_initialize(void)
{
+ timestamp_add_now(TS_BEFORE_INITRAM);
enable_spd();
dump_spd_registers();
@@ -1051,4 +1053,5 @@ void sdram_initialize(void)
sdram_enable();
disable_spd();
+ timestamp_add_now(TS_AFTER_INITRAM);
}