diff options
| author | Julius Werner <jwerner@chromium.org> | 2019-11-08 22:51:16 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-11 10:29:04 +0000 |
| commit | e396c662c0916a8938cbc0cab4bd5820088e26a4 (patch) | |
| tree | ab8f1999bfb545c351954ad90fa31758459a1721 | |
| parent | 5c7b74a22bd69e5f41380eba1a3b3be61512d24d (diff) | |
| download | coreboot-e396c662c0916a8938cbc0cab4bd5820088e26a4.tar.xz | |
rockchip/rk3288: Bump verstage size a little more
RK3288 is running out of space again. I believe reducing the CBFS cache
size this much should be safe. I don't really care to test it either
though. We should probably just deprecate that SoC at some point, it's
just causing too much pain.
Change-Id: Id8f971606a7a183d3e9af8bbb1b353e518ec24c8
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36692
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Joel Kitching <kitching@google.com>
| -rw-r--r-- | src/soc/rockchip/rk3288/include/soc/memlayout.ld | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/rockchip/rk3288/include/soc/memlayout.ld b/src/soc/rockchip/rk3288/include/soc/memlayout.ld index 6320fadcba..94a672db0c 100644 --- a/src/soc/rockchip/rk3288/include/soc/memlayout.ld +++ b/src/soc/rockchip/rk3288/include/soc/memlayout.ld @@ -33,8 +33,8 @@ SECTIONS BOOTBLOCK(0xFF704004, 20K - 4) PRERAM_CBMEM_CONSOLE(0xFF709000, 2K) VBOOT2_WORK(0xFF709800, 12K) - OVERLAP_VERSTAGE_ROMSTAGE(0xFF70C800, 42K) - PRERAM_CBFS_CACHE(0xFF717000, 1K) + OVERLAP_VERSTAGE_ROMSTAGE(0xFF70C800, 42K + 768) + PRERAM_CBFS_CACHE(0xFF717300, 256) TIMESTAMP(0xFF717400, 0x180) STACK(0xFF717580, 3K - 0x180) SRAM_END(0xFF718000) |