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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-08-02 10:15:44 +1000
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-08-13 05:01:58 +0200
commitef3a17bd88f3c751ef98d3be94eb922da14ce3c5 (patch)
treeadd50fba9f74cc92e6fc66c94c64a23186f885f9
parent691ff08e27b9f79e5178a0c3e6c51f9327f207d5 (diff)
downloadcoreboot-ef3a17bd88f3c751ef98d3be94eb922da14ce3c5.tar.xz
util/inteltool: Typo in dump output for 'GP_IO_SEL3'
The GPIO offset of '0x44 - GP_IO_SEL3' as specified in the pch.h header is incorrectly reported as 'GPIO_SEL3'. Change-Id: I56dcdda109d5f57ed45938d60b995807bdfb46b1 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6459 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
-rw-r--r--util/inteltool/gpio.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/util/inteltool/gpio.c b/util/inteltool/gpio.c
index 42e7272c23..49c1325663 100644
--- a/util/inteltool/gpio.c
+++ b/util/inteltool/gpio.c
@@ -188,7 +188,7 @@ static const io_register_t ich10_gpio_registers[] = {
{ 0x38, 4, "GP_LVL2" },
{ 0x3C, 4, "RESERVED" },
{ 0x40, 4, "GPIO_USE_SEL3" },
- { 0x44, 4, "GPIO_SEL3" },
+ { 0x44, 4, "GP_IO_SEL3" },
{ 0x48, 4, "GPIO_LVL3" },
{ 0x4c, 4, "RESERVED" },
{ 0x50, 4, "RESERVED" },
@@ -242,7 +242,7 @@ static const io_register_t pch_gpio_registers[] = {
{ 0x38, 4, "GP_LVL2" },
{ 0x3c, 4, "RESERVED" },
{ 0x40, 4, "GPIO_USE_SEL3" },
- { 0x44, 4, "GPIO_SEL3" },
+ { 0x44, 4, "GP_IO_SEL3" },
{ 0x48, 4, "GPIO_LVL3" },
{ 0x4c, 4, "RESERVED" },
{ 0x50, 4, "RESERVED" },