summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorStefan Reinauer <reinauer@chromium.org>2014-01-22 15:16:30 -0800
committerPatrick Georgi <patrick@georgi-clan.de>2014-07-04 17:50:13 +0200
commitf1aabecaaccbac8ed575312f3801ec9de7e912a9 (patch)
tree209f6649d938713814cd3ff407a8e8d39a353f4f
parent0089c2418b252483120f72a47955f771b3993a28 (diff)
downloadcoreboot-f1aabecaaccbac8ed575312f3801ec9de7e912a9.tar.xz
intel/haswell: Allow pre-graphics delay
Some slow monitors/TVs can't wake up quickly enough for coreboot, so when the VBIOS is run it won't detect them. Hence, add an option to wait for a while before running the VBIOS. BUG=none BRANCH=panther TEST=Boot to dev mode on one of the systems that exposed the problem and see it go away. Change-Id: Ib9524f1c7ee08bedf96a6468da8b4ccf712fe0e2 Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/183545 Reviewed-by: Mohammed Habibulla <moch@google.com> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/6009 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
-rw-r--r--src/northbridge/intel/haswell/Kconfig9
-rw-r--r--src/northbridge/intel/haswell/gma.c1
2 files changed, 10 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
index 4b15c7bb9a..e8d84d1725 100644
--- a/src/northbridge/intel/haswell/Kconfig
+++ b/src/northbridge/intel/haswell/Kconfig
@@ -107,4 +107,13 @@ config CBFS_SIZE
This option allows to limit the size of the CBFS portion in the
firmware image.
+config PRE_GRAPHICS_DELAY
+ int
+ default 0
+ help
+ On some systems, coreboot boots so fast that connected monitors
+ (mostly TVs) won't be able to wake up fast enough to talk to the
+ VBIOS. On those systems we need to wait for a bit before executing
+ the VBIOS.
+
endif
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index 0c56f76018..95c7b2241d 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -414,6 +414,7 @@ static void gma_func0_init(struct device *dev)
#endif
if (! lightup_ok) {
printk(BIOS_SPEW, "FUI did not run; using VBIOS\n");
+ mdelay(CONFIG_PRE_GRAPHICS_DELAY);
pci_dev_init(dev);
}