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| author | Aaron Durbin <adurbin@chromium.org> | 2017-11-01 15:47:05 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-11-02 15:46:19 +0000 |
| commit | f4258dec633d276868aa3cce66e0111a8a7d57d3 (patch) | |
| tree | d50a241496879843c3ed1b9d170dcc9ce6ff8a84 | |
| parent | 383ef6eef88fb285b3ba07a5d935e9285398b3fe (diff) | |
| download | coreboot-f4258dec633d276868aa3cce66e0111a8a7d57d3.tar.xz | |
cpu/x86/mtrr: fix fls() and fms() inline assembly
The x86 bsf and bsr instructions only allow for a memory
or register operand. The 'g' constraint includes immediate
operands which the compiler could choose to emit for the instruction.
However, the assembler will rightfully complain because the
instruction with an immediate operand is illegal. Fix the constraints
to bsf and bsr to only include memory or registers.
Change-Id: Idea7ae7df451eb69dd30208ebad7146ca01f6cba
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/22291
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
| -rw-r--r-- | src/include/cpu/x86/mtrr.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h index 71278f32bf..a72d602ccd 100644 --- a/src/include/cpu/x86/mtrr.h +++ b/src/include/cpu/x86/mtrr.h @@ -97,7 +97,7 @@ static inline unsigned int fms(unsigned int x) __asm__("bsrl %1,%0\n\t" "jnz 1f\n\t" "movl $0,%0\n" - "1:" : "=r" (r) : "g" (x)); + "1:" : "=r" (r) : "mr" (x)); return r; } @@ -109,7 +109,7 @@ static inline unsigned int fls(unsigned int x) __asm__("bsfl %1,%0\n\t" "jnz 1f\n\t" "movl $32,%0\n" - "1:" : "=r" (r) : "g" (x)); + "1:" : "=r" (r) : "mr" (x)); return r; } #endif /* !defined(__ASSEMBLER__) && !defined(__ROMCC__) */ |