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authorSubrata Banik <subrata.banik@intel.com>2015-12-07 19:49:01 +0530
committerPatrick Georgi <pgeorgi@google.com>2016-01-15 12:03:15 +0100
commitfbc4609265dab70e09b2f59e4f93f60f81c110c4 (patch)
tree25c03ec7c214a037b62af8d912652bd368e5304b
parentb7a42d388b97c7956dd648fc2f49195142a8b4e2 (diff)
downloadcoreboot-fbc4609265dab70e09b2f59e4f93f60f81c110c4.tar.xz
intel/skylake: Add GPIO ACPI Apis.
GPIO ASL APIs to get GPIO Value. Need such APIs to read GPIO config settings. Example: Kunimitsu need to read AUDIO_DB GPIO to identify codec select. BUG=chrome-os-partner:44481 BRANCH=none TEST=build and boot on Kunimitsu. Change-Id: If56bb7b3eae08e1949d372850a6426dfde5aadd0 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4983ba835a8da2baf578b035ae482755983c1ecb Original-Change-Id: Ia40d86c8d4b14857fa8822677b3f7d393a35b677 Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/316352 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/12956 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
-rw-r--r--src/soc/intel/skylake/acpi/gpio.asl46
1 files changed, 46 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/acpi/gpio.asl b/src/soc/intel/skylake/acpi/gpio.asl
index 42f2ee7770..d305e91850 100644
--- a/src/soc/intel/skylake/acpi/gpio.asl
+++ b/src/soc/intel/skylake/acpi/gpio.asl
@@ -13,6 +13,7 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
+#include <soc/gpio_defs.h>
Device (GPIO)
{
@@ -67,3 +68,48 @@ Device (GPIO)
Return (0xF)
}
}
+
+/*
+ * Get GPIO DW0 Address
+ * Arg0 - GPIO Number
+ */
+Method (GADD, 1, NotSerialized)
+{
+ /* GPIO Community 0 */
+ If (LAnd (LGreaterEqual (Arg0, GPP_A0), LLessEqual (Arg0, GPP_B23)))
+ {
+ Store (PID_GPIOCOM0, Local0)
+ Subtract (Arg0, GPP_A0, Local1)
+ }
+ /* GPIO Community 1 */
+ If (LAnd (LGreaterEqual (Arg0, GPP_C0), LLessEqual (Arg0, GPP_E23)))
+ {
+ Store (PID_GPIOCOM1, Local0)
+ Subtract (Arg0, GPP_C0, Local1)
+ }
+ /* GPIO Community 03*/
+ If (LAnd (LGreaterEqual (Arg0, GPP_F0), LLessEqual (Arg0, GPP_G7)))
+ {
+ Store (PID_GPIOCOM3, Local0)
+ Subtract (Arg0, GPP_F0, Local1)
+ }
+ Store (PCRB (Local0), Local2)
+ Add (Local2, PAD_CFG_DW_OFFSET, Local2)
+ Return (Add (Local2, Multiply (Local1, 8)))
+}
+
+/*
+ * Get GPIO Value
+ * Arg0 - GPIO Number
+ */
+Method (GRXS, 1, NotSerialized)
+{
+ OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
+ Field (PREG, AnyAcc, NoLock, Preserve)
+ {
+ VAL0, 32
+ }
+ And (GPIORXSTATE_MASK, ShiftRight (VAL0, GPIORXSTATE_SHIFT), Local0)
+
+ Return (Local0)
+}