diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2017-07-12 15:13:53 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-17 15:16:30 +0000 |
| commit | 0beac81f64162fe8374c9f008b9ea811f5064b34 (patch) | |
| tree | 9608635ed6f9de9dfd1f1d29a906b52a38f00f9b | |
| parent | b5a5aa645068414b769e7304d46270f85d974616 (diff) | |
| download | coreboot-0beac81f64162fe8374c9f008b9ea811f5064b34.tar.xz | |
intel/fsp1_1: Don't consume FSP_SMBIOS_MEMORY_INFO_HOB in S3 resume path
FSP doesn't publish smbios_memory_info_guid during S3 resume
path. Hence it's recommended to skip consuming this HOB in
S3 resume.
Bug=none
Branch=none
TEST=Build and boot Lars system with this patch.
Change-Id: I321751523b1ea3326ffc23f4d4c53d5362482674
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/20540
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| -rw-r--r-- | src/drivers/intel/fsp1_1/romstage.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index c2fc667dfd..4bc95c94f0 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -101,6 +101,7 @@ void *cache_as_ram_stage_main(FSP_INFO_HEADER *fih) /* Entry from the mainboard. */ void romstage_common(struct romstage_params *params) { + bool s3wake; struct region_device rdev; struct pei_data *pei_data; @@ -110,11 +111,10 @@ void romstage_common(struct romstage_params *params) pei_data = params->pei_data; pei_data->boot_mode = params->power_state->prev_sleep_state; + s3wake = params->power_state->prev_sleep_state == ACPI_S3; -#if IS_ENABLED(CONFIG_ELOG_BOOT_COUNT) - if (params->power_state->prev_sleep_state != ACPI_S3) + if (IS_ENABLED(CONFIG_ELOG_BOOT_COUNT) && !s3wake) boot_count_increment(); -#endif /* Perform remaining SOC initialization */ soc_pre_ram_init(params); @@ -168,7 +168,8 @@ void romstage_common(struct romstage_params *params) } /* Save DIMM information */ - mainboard_save_dimm_info(params); + if (!s3wake) + mainboard_save_dimm_info(params); /* Create romstage handof information */ if (romstage_handoff_init( |