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authorTim Wawrzynczak <twawrzynczak@chromium.org>2020-05-29 13:11:00 -0600
committerPatrick Georgi <pgeorgi@google.com>2020-06-14 16:48:55 +0000
commit103bd5e4bb14fda521f64525394b2e9232297dfd (patch)
tree07a4d6eac642f9c0eec2ad4bca355338e0e0bac8
parentf3668fc1de927c87a2a895bc2a433df3f45e2f92 (diff)
downloadcoreboot-103bd5e4bb14fda521f64525394b2e9232297dfd.tar.xz
dptf: Introduce new paradigm for configuring DPTF parameters
Currently, configuring and reviewing DPTF parameters is difficult because DPTF tables and methods are defined in static ASL files, and are littered with #ifdefs which both define parameters and influence behavior (e.g., whether a method is included or not). This patch train is an effort to bring DPTF support to our ACPI DSDT/SSDT generation framework. This first patch is very minimal, and includes only creation of the DPTF device (in the DSDT). BUG=b:143539650 TEST=compiles (later tests get more comprehensive). Change-Id: I14df9f422c911677aeea25552ac1822a9462c58a Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41883 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/drivers/intel/dptf/Kconfig7
-rw-r--r--src/drivers/intel/dptf/Makefile.inc1
-rw-r--r--src/drivers/intel/dptf/chip.h9
-rw-r--r--src/drivers/intel/dptf/dptf.c56
4 files changed, 73 insertions, 0 deletions
diff --git a/src/drivers/intel/dptf/Kconfig b/src/drivers/intel/dptf/Kconfig
new file mode 100644
index 0000000000..7db335ac1c
--- /dev/null
+++ b/src/drivers/intel/dptf/Kconfig
@@ -0,0 +1,7 @@
+config DRIVERS_INTEL_DPTF
+ bool "Support runtime generation of Intel DPTF ACPI tables"
+ depends on HAVE_ACPI_TABLES
+ default n
+ help
+ When enabled, entries in the devicetree are used to generate
+ Intel DPTF Tables at runtime in the SSDT.
diff --git a/src/drivers/intel/dptf/Makefile.inc b/src/drivers/intel/dptf/Makefile.inc
new file mode 100644
index 0000000000..42607f8a54
--- /dev/null
+++ b/src/drivers/intel/dptf/Makefile.inc
@@ -0,0 +1 @@
+ramstage-$(CONFIG_DRIVERS_INTEL_DPTF) += dptf.c
diff --git a/src/drivers/intel/dptf/chip.h b/src/drivers/intel/dptf/chip.h
new file mode 100644
index 0000000000..704b83e763
--- /dev/null
+++ b/src/drivers/intel/dptf/chip.h
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef _DRIVERS_INTEL_DPTF_CHIP_H_
+#define _DRIVERS_INTEL_DPTF_CHIP_H_
+
+struct drivers_intel_dptf_config {
+};
+
+#endif /* _DRIVERS_INTEL_DPTF_CHIP_H_ */
diff --git a/src/drivers/intel/dptf/dptf.c b/src/drivers/intel/dptf/dptf.c
new file mode 100644
index 0000000000..f168375448
--- /dev/null
+++ b/src/drivers/intel/dptf/dptf.c
@@ -0,0 +1,56 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpigen.h>
+#include <console/console.h>
+#include <device/device.h>
+#include "chip.h"
+
+static const char *dptf_acpi_name(const struct device *dev)
+{
+ return "DPTF";
+}
+
+/* Add custom tables and methods to SSDT */
+static void dptf_fill_ssdt(const struct device *dev)
+{
+ struct drivers_intel_dptf_config *config = dev->chip_info;
+
+ printk(BIOS_INFO, "\\_SB.DPTF: %s at %s\n", dev->chip_ops->name, dev_path(dev));
+}
+
+/* Add static definitions of DPTF devices into the DSDT */
+static void dptf_inject_dsdt(const struct device *dev)
+{
+ const struct drivers_intel_dptf_config *config;
+
+ config = dev->chip_info;
+ acpigen_write_scope("\\_SB");
+
+ /* Toplevel DPTF device */
+ acpigen_write_device(acpi_device_name(dev));
+ acpigen_write_name("_HID");
+ acpigen_emit_eisaid("INT3400");
+ acpigen_write_name_integer("_UID", 0);
+ dptf_write_STA();
+
+ acpigen_pop_len(); /* DPTF Device */
+ acpigen_pop_len(); /* Scope */
+}
+
+static struct device_operations dptf_ops = {
+ .read_resources = noop_read_resources,
+ .set_resources = noop_set_resources,
+ .acpi_name = dptf_acpi_name,
+ .acpi_fill_ssdt = dptf_fill_ssdt,
+ .acpi_inject_dsdt = dptf_inject_dsdt,
+};
+
+static void dptf_enable_dev(struct device *dev)
+{
+ dev->ops = &dptf_ops;
+}
+
+struct chip_operations drivers_intel_dptf_ops = {
+ CHIP_NAME("Intel DPTF")
+ .enable_dev = dptf_enable_dev,
+};