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authorDuncan Laurie <dlaurie@chromium.org>2013-12-12 10:43:21 -0800
committerAaron Durbin <adurbin@google.com>2014-01-30 05:26:14 +0100
commit16e899ba943f45b8506c3e75752adfc7dc2b52ba (patch)
tree154af6da5e980e4e7f3346389d8c907379624efb
parentd37705c3b0ead5f0ff715bd27959114cd273fb6c (diff)
downloadcoreboot-16e899ba943f45b8506c3e75752adfc7dc2b52ba.tar.xz
cbmem: Export ACPI GNVS cbmem pointer in coreboot table
This will make it possible for payloads to find the ACPI NVS region which is needed to get base addresses for devices that are in ACPI mode. BUG=chrome-os-partner:24380 BRANCH=none TEST=build and boot rambi with emmc in ACPI mode Change-Id: Ia67b66ee8bd45ab8270444bbb2802080d31d14eb Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/179849 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/5015 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
-rw-r--r--src/include/boot/coreboot_tables.h1
-rw-r--r--src/lib/coreboot_table.c3
2 files changed, 3 insertions, 1 deletions
diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h
index aa8409afd4..6243d4589c 100644
--- a/src/include/boot/coreboot_tables.h
+++ b/src/include/boot/coreboot_tables.h
@@ -225,6 +225,7 @@ struct lb_vdat {
#define LB_TAG_TIMESTAMPS 0x0016
#define LB_TAG_CBMEM_CONSOLE 0x0017
#define LB_TAG_MRC_CACHE 0x0018
+#define LB_TAG_ACPI_GNVS 0x0024
struct lb_cbmem_ref {
uint32_t tag;
uint32_t size;
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index 183e10378b..d5dc14cc81 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -264,7 +264,8 @@ static void add_cbmem_pointers(struct lb_header *header)
int table_tag;
} section_ids[] = {
{CBMEM_ID_TIMESTAMP, LB_TAG_TIMESTAMPS},
- {CBMEM_ID_CONSOLE, LB_TAG_CBMEM_CONSOLE}
+ {CBMEM_ID_CONSOLE, LB_TAG_CBMEM_CONSOLE},
+ {CBMEM_ID_ACPI_GNVS, LB_TAG_ACPI_GNVS},
};
int i;