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authorjinkun.hong <jinkun.hong@rock-chips.com>2015-08-13 10:52:52 +0800
committerPatrick Georgi <pgeorgi@google.com>2015-08-28 06:44:04 +0000
commit274cde56cd7b0e1b93688966a9ee89bf17cda6e3 (patch)
tree425ab4d522cb159c61448c720026c4564a9a1138
parent46502c9e374c30018773f09d0be78577cbcf3d0e (diff)
downloadcoreboot-274cde56cd7b0e1b93688966a9ee89bf17cda6e3.tar.xz
veyron: mickey sdram-lpddr3-samsung-2GB.inc enable odt
only modify the MR3 value, there will always be some mickey not working properly. After enable ODT, we use many mickey do tests, now functioning properly. BRANCH=None BUG=chrome-os-partner:43626 TEST=My mickey now boots up Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Original-Commit-Id: 681c169d59f5638d35b777eb2b7543e3b0dd90c8 Original-Change-Id: Ieb2b8a56054f91b6be81260e4c574425fb72fed3 Original-Signed-off-by: jinkun.hong <jinkun.hong@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/293324 Original-Reviewed-by: Douglas Anderson <dianders@chromium.org> Original-Commit-Queue: Douglas Anderson <dianders@chromium.org> Original-Trybot-Ready: Douglas Anderson <dianders@chromium.org> Original-Tested-by: Douglas Anderson <dianders@chromium.org> Original-(cherry picked from commit 5397c2f32f5851b9f514b0bd2ae68999a77cabbf) Original-Reviewed-on: https://chromium-review.googlesource.com/294126 Change-Id: Icb3c839bebebfcae54fc6e96e9958c7020d49eff Reviewed-on: http://review.coreboot.org/11396 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
-rw-r--r--src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-2GB.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-2GB.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-2GB.inc
index 666b12fbd3..89dfd69ad1 100644
--- a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-2GB.inc
+++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-2GB.inc
@@ -75,5 +75,5 @@
.dramtype = LPDDR3,
.num_channels = 2,
.stride = 9,
- .odt = 0,
+ .odt = 1,
},