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authorArthur Heymans <arthur@aheymans.xyz>2019-01-22 21:22:52 +0100
committerNico Huber <nico.h@gmx.de>2019-01-24 21:46:51 +0000
commit2bbffc0442ac58539d57895de2311bc3dc634771 (patch)
tree8290827cd8bffb753c7256486c46435b5381f673
parentff28371521e453541c3c2de50dd5c3dfc68cc292 (diff)
downloadcoreboot-2bbffc0442ac58539d57895de2311bc3dc634771.tar.xz
mb/*/*/devicetree.cb: Move the ioapic device under the LPC bridge
This fixes spurious lines "child IOAPIC: 02 not a PCI device" and IOAPIC as leftover device. Change-Id: Id8010c84c45f0859508e7564c0eaa501904b7043 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/31041 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
-rw-r--r--src/mainboard/lenovo/t400/devicetree.cb17
-rw-r--r--src/mainboard/lenovo/x200/devicetree.cb17
-rw-r--r--src/mainboard/roda/rk9/devicetree.cb16
3 files changed, 26 insertions, 24 deletions
diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb
index 59458690a9..4e88e276d3 100644
--- a/src/mainboard/lenovo/t400/devicetree.cb
+++ b/src/mainboard/lenovo/t400/devicetree.cb
@@ -76,14 +76,6 @@ chip northbridge/intel/gm45
register "pcie_power_limits" = "{ { 10, 0 }, { 10, 0 }, { 0, 0 }, { 10, 0 }, { 0, 0 }, { 0, 0 } }"
register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
- chip drivers/generic/ioapic
- register "have_isa_interrupts" = "1"
- register "irq_on_fsb" = "1"
- register "enable_virtual_wire" = "1"
- register "base" = "(void *)0xfec00000"
- device ioapic 2 on end
- end
-
device pci 19.0 on end # LAN
device pci 1a.0 on # UHCI
subsystemid 0x17aa 0x20f0
@@ -141,6 +133,15 @@ chip northbridge/intel/gm45
end
device pci 1f.0 on # LPC bridge
subsystemid 0x17aa 0x20f5
+
+ chip drivers/generic/ioapic
+ register "have_isa_interrupts" = "1"
+ register "irq_on_fsb" = "1"
+ register "enable_virtual_wire" = "1"
+ register "base" = "(void *)0xfec00000"
+ device ioapic 2 on end
+ end
+
chip ec/lenovo/pmh7
device pnp ff.1 on # dummy
end
diff --git a/src/mainboard/lenovo/x200/devicetree.cb b/src/mainboard/lenovo/x200/devicetree.cb
index b74f25a65d..d800e4fdfe 100644
--- a/src/mainboard/lenovo/x200/devicetree.cb
+++ b/src/mainboard/lenovo/x200/devicetree.cb
@@ -80,14 +80,6 @@ chip northbridge/intel/gm45
register "pcie_power_limits" = "{ { 10, 0 }, { 10, 0 }, { 0, 0 }, { 10, 0 }, { 0, 0 }, { 0, 0 } }"
register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
- chip drivers/generic/ioapic
- register "have_isa_interrupts" = "1"
- register "irq_on_fsb" = "1"
- register "enable_virtual_wire" = "1"
- register "base" = "(void *)0xfec00000"
- device ioapic 2 on end
- end
-
device pci 19.0 on end # LAN
device pci 1a.0 on # UHCI
subsystemid 0x17aa 0x20f0
@@ -145,6 +137,15 @@ chip northbridge/intel/gm45
end
device pci 1f.0 on # LPC bridge
subsystemid 0x17aa 0x20f5
+
+ chip drivers/generic/ioapic
+ register "have_isa_interrupts" = "1"
+ register "irq_on_fsb" = "1"
+ register "enable_virtual_wire" = "1"
+ register "base" = "(void *)0xfec00000"
+ device ioapic 2 on end
+ end
+
chip ec/lenovo/pmh7
device pnp ff.1 on # dummy
end
diff --git a/src/mainboard/roda/rk9/devicetree.cb b/src/mainboard/roda/rk9/devicetree.cb
index 690c2a5b59..4300171207 100644
--- a/src/mainboard/roda/rk9/devicetree.cb
+++ b/src/mainboard/roda/rk9/devicetree.cb
@@ -67,14 +67,6 @@ chip northbridge/intel/gm45
# Maybe we should set less for Mini PCIe.
register "pcie_power_limits" = "{ { 10, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 10, 0 }, { 0, 0 } }"
- chip drivers/generic/ioapic
- register "have_isa_interrupts" = "1"
- register "irq_on_fsb" = "1"
- register "enable_virtual_wire" = "1"
- register "base" = "(void *)0xfec00000"
- device ioapic 2 on end
- end
-
device pci 19.0 off end # LAN
device pci 1a.0 on # UHCI
ioapic_irq 2 INTA 0x10
@@ -126,6 +118,14 @@ chip northbridge/intel/gm45
device pci 03.4 off end # unconnected SD-Card
end
device pci 1f.0 on # LPC bridge
+ chip drivers/generic/ioapic
+ register "have_isa_interrupts" = "1"
+ register "irq_on_fsb" = "1"
+ register "enable_virtual_wire" = "1"
+ register "base" = "(void *)0xfec00000"
+ device ioapic 2 on end
+ end
+
chip superio/smsc/lpc47n227
device pnp 2e.1 on # Parallel port
io 0x60 = 0x378