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| author | Aaron Durbin <adurbin@chromium.org> | 2016-07-18 12:41:09 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-07-19 20:19:25 +0200 |
| commit | 35d42c75648dee229dbf0a8adc0ebfa2ddf81dd4 (patch) | |
| tree | fa3f5f5d42ced594685eca53f68991349ba154a4 | |
| parent | f41f2aab7c069911b0549bf2c95707aaa64bf26d (diff) | |
| download | coreboot-35d42c75648dee229dbf0a8adc0ebfa2ddf81dd4.tar.xz | |
drivers/intel/fsp2_0: handle reset requests from FSPS
The FSPS component can request resets. Handle those
generically.
BUG=chrome-os-partner:52679
Change-Id: I41c2da543420102d864e3c5e039fed13632225b4
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15748
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
| -rw-r--r-- | src/drivers/intel/fsp2_0/silicon_init.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c index 83245b8bdb..cc8c408c05 100644 --- a/src/drivers/intel/fsp2_0/silicon_init.c +++ b/src/drivers/intel/fsp2_0/silicon_init.c @@ -53,6 +53,10 @@ static enum fsp_status do_silicon_init(struct fsp_header *hdr) post_code(POST_FSP_SILICON_INIT); printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status); + + /* Handle any resets requested by FSPS. */ + fsp_handle_reset(status); + return status; } |