diff options
| author | Paul Menzel <pmenzel@molgen.mpg.de> | 2017-10-24 15:38:51 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2017-11-03 07:40:55 +0000 |
| commit | 454cfa00b98426c018763b78e8d792aaec8d6826 (patch) | |
| tree | 698cf4a2a3cac798b9c8652ff692353c71ed47e4 | |
| parent | 545593d62c613a4053b8ce154c22668a6d37c733 (diff) | |
| download | coreboot-454cfa00b98426c018763b78e8d792aaec8d6826.tar.xz | |
soc/mediatek/mt8173: Correct multi-line comment format
Make the format of two multi-line comments compliant with the coding
style.
Change-Id: I8bc7b1eb175957b76ca19acdcb29b06ae86429b4
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/22279
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
| -rw-r--r-- | src/soc/mediatek/mt8173/memory.c | 3 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8173/mt6391.c | 4 |
2 files changed, 5 insertions, 2 deletions
diff --git a/src/soc/mediatek/mt8173/memory.c b/src/soc/mediatek/mt8173/memory.c index 3db9df869e..3897f8b09a 100644 --- a/src/soc/mediatek/mt8173/memory.c +++ b/src/soc/mediatek/mt8173/memory.c @@ -343,7 +343,8 @@ void mt_mem_init(const struct mt8173_sdram_params *sdram_params) mt_set_emi(sdram_params); if (IS_ENABLED(CONFIG_MEMORY_TEST)) { - /* do memory test: + /* + * do memory test: * set memory scan range 0x2000 * larger test length, longer system boot up time */ diff --git a/src/soc/mediatek/mt8173/mt6391.c b/src/soc/mediatek/mt8173/mt6391.c index 9ba3503d6b..8ef181491f 100644 --- a/src/soc/mediatek/mt8173/mt6391.c +++ b/src/soc/mediatek/mt8173/mt6391.c @@ -415,7 +415,9 @@ static void mt6391_default_buck_voltage(void) { u16 reg_val = 0; u16 buck_val = 0; - /* There are two kinds of PMIC used for MT8173 : MT6397s/MT6391. + /* + * There are two kinds of PMIC used for MT8173 : MT6397s/MT6391. + * * MT6397s: the default voltage of register was not suitable for * MT8173, needs to apply the setting of eFuse. * VPCA15/VSRMCA15/: 1.15V |